Browsing by Author "Chiu, Te-Hsin"

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Performance and interface characterization for contact etch stop layer-strained nMOSFET with HfO2 gate dielectrics under pulsed-IV measurement
(2008)
Wu, Woei-Cherng
;
Chao, Tien-Sheng
;
Chiu, Te-Hsin
;
Wang, Jer-Chyi
;
Lai, Chao-Sung
In this paper, high-performance contact etching stop layer (CESL)-strained n-metal-oxide-semiconductor field effect transistor (nMOSFET) with HfO2 gate dielectrics has been successfully demonstrated. The effects of the CESL layer to the high-k without trapping behaviors are investigated by the pulse current-voltage (IV) technique for the first time. It is found that a roughly 55 and 60% increase of mobility and I-ON, respectively, can be achieved for the 300 nm CESL HfO2 nMOSFET using pulsed-IV measurement. Furthermore, a superior HfO2/Si interface for CESL devices is observed, demonstrated by an obvious interface state density reduction (6 x 10(11)-9 x 10(10) cm(-2)).
Performance enhancement for strained HfO(2) nMOSFET with contact etch stop layer (CESL) under pulsed-IV measurement
(2007)
Wu, Woei-Cherng
;
Chao, Tien-Sheng
;
Chiu, Te-Hsin
;
Wang, Jer-Chyi
;
Lai, Chao-Sung
High-performance CESL strained nMOSFET with HfO(2) gate dielectrics has been successfully demonstrated in this work. It is found that, the transconductance (g(m)) and driving current (I(on)) of the nMOSFETs increase 70% and 90%, respectively, of the increase of devices with a 300 nm capping nitride layer. A superior HfO(2)/Si interface for CESL-devices is observed, demonstrated by an obvious interface state density reduction (6.56x10(11) to 9.85x10(10) cm(-2)). Further, a roughly 50% and 60% increase of g(m) and I(on), respectively, can be achieved for the 300 nm SiN-capped HfO(2) nMOSFET without considering charge trapping under pulsed-IV measurement.
Positive Bias Temperature Instability (PBTI) Characteristics of Contact-Etch-Stop-Layer-Induced Local-Tensile-Strained HfO(2) nMOSFET
(2008-12-01)
Wu, Woei-Cherng
;
Chao, Tien-Sheng
;
Chiu, Te-Hsin
;
Wang, Jer-Chyi
;
Lai, Chao-Sung
The positive bias temperature instability (PBTI) characteristics of contact-etch-stop-layer (CESL)-strained HfO(2) nMOSFET are thoroughly investigated. For the first time, the effects of CESL on an HfO(2) dielectric are investigated for PBTI characteristics. A roughly 50% reduction Of V(TH) shift can be achieved for the 300-nm CESL HfO(2) nMOSFET after 1000-s PBTI stressing without obvious HfO(2)/Si interface degradation, as demonstrated by the negligible charge pumping current increase (< 4%). In addition, the HfO(2) film of CESL devices has a deeper trapping level (0.83 eV), indicating that most of the shallow traps (0.75 eV) in as-deposited HfO(2) film can be eliminated for CESL devices.
Positive Bias Temperature Instability (PBTI) Characteristics of Contact-Etch-Stop-Layer-Induced Local-Tensile-Strained HfO2 nMOSFET
(2008-12-01)
Wu, Woei-Cherng
;
Chao, Tien-Sheng
;
Chiu, Te-Hsin
;
Wang, Jer-Chyi
;
Lai, Chao-Sung
The positive bias temperature instability (PBTI) characteristics of contact-etch-stop-layer (CESL)-strained HfO2 nMOSFET are thoroughly investigated. For the first time, the effects of CESL on an HfO2 dielectric are investigated for PBTI characteristics. A roughly 50% reduction Of V-TH shift can be achieved for the 300-nm CESL HfO2 nMOSFET after 1000-s PBTI stressing without obvious HfO2/Si interface degradation, as demonstrated by the negligible charge pumping current increase (< 4%). In addition, the HfO2 film of CESL devices has a deeper trapping level (0.83 eV), indicating that most of the shallow traps (0.75 eV) in as-deposited HfO2 film can be eliminated for CESL devices.