Browsing by Author "Chiu, Te-Yen"

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A Flip-Chip-Assembled W-Band Receiver in 90-nm CMOS and IPD Technologies
(2019-04-01)
Li, Chun-Hsing
;
Hsieh, Wan-Ting
;
Chiu, Te-Yen
;
交大名義發表
;
National Chiao Tung University
A flip-chip-assembled W-band receiver composed of a 90-nm CMOS chip and an integrated-passive-device (IPD) carrier is presented in this paper. The chip which integrates a low-noise amplifier, a single-sideband mixer, a frequency doubler (FD), and a wide-band variable-gain amplifier, is flip-chip packaged to the IPD carrier through a low-loss interconnect. The simulated loss of the interconnect without any compensation network is only 0.95 dB at 94 GHz. The FD can provide differential output without any additional lossy balun required, effectively increasing the FD output power, and hence relaxing the local oscillator generation circuit design. The experimental results show that the proposed packaged receiver can provide a variable gain from 11.3 to 48.2 dB, while having an input 1-dB compression point from -43.7 to -29 dBm as the RF frequency is 90 GHz. The intermediate bandwidth and minimum noise figure can be 1.0 GHz and 7.8 dB, respectively. The proposed receiver only consumes 73.9 mW from a 1.2-V supply. As compared with prior works, the proposed receiver exhibits higher gain, lower noise, and lower power dissipation even though a less-advanced 90-nm CMOS technology is adopted. To the best of the authors' knowledge, this is the first W-band CMOS receiver assembled on an IPD carrier reported thus far.
Enhancement of CMOS THz Imaging Sensing By Packaging Technology
(2017-01-01)
Kuo, Chien-Nan
;
Chen, Wei-Cheng
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Chiu, Te-Yen
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Li, Chun-Hsing
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電子工程學系及電子研究所
Terahertz imaging sensing provides numerous attractive applications in different areas, for example, biology and medicine. CMOS technology benefits an imaging system in low cost and a small form factor. The technology advance is technically viable for circuit design in such high frequencies. Lossy silicon substrate, however, still degrades system performance. We will discuss the techniques of performance enhancement.
Single Flip-Chip Packaged Dielectric Resonator Antenna for CMOS Terahertz Antenna Array Gain Enhancement
(2019-01-01)
Li, Chun-Hsing
;
Chiu, Te-Yen
;
交大名義發表
;
National Chiao Tung University
A single dielectric resonator antenna (DRA) capable of enhancing the antenna gain of each element of a 2x2 terahertz (THz) antenna array realized in a 0.18-mu m CMOS technology is proposed in this paper. The DRA implemented in a low-cost integrated-passive-device technology is flip-chip packaged onto the CMOS antenna array chip through low-loss gold bumps. By designing the DRA to work at the higher order mode of TE3,delta,9, only a single DRA, instead of conventionally needing four DRAs, is required to simultaneously improve the antenna gain of each element of the 2 x 2 antenna array. This not only simplifies the assembly process, but it can also reduce the assembly cost. Moreover, the DRA can provide great antenna gain enhancement because of being made of high-resistivity silicon material and higher order mode operation. The simulated antenna gain of each on-chip patch antenna of the 2x2 CMOS antenna array can be increased from 0.1 to 8.6 dBi at 339 GHz as the DRA is added. To characterize the proposed DRA, four identical power detectors (PDs) are designed and integrated with each element of the 2x2 THz antenna array. By measuring the voltage responsivity of each PD output, the characteristics of each antenna of the antenna array with the proposed DRA, including the gain enhancement level and radiation pattern, can be acquired. The measurement results match well with the simulated ones, verifying the proposed DRA operation principle. The four PDs with the proposed DRA are also successfully employed to demonstrate a THz imaging system at 340 GHz. To the best of our knowledge, the proposed DRA is the one with the highest order operation mode at THz frequencies reported thus far.