Browsing by Author "Chiu, Yung-Yueh"

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A Unified 3D Device Simulation of Random Dopant, Interface Trap and Work Function Fluctuations on High-kappa/Metal Gate Device
(2011)
Li, Yiming
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Cheng, Hui-Wen
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Chiu, Yung-Yueh
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Yiu, Chun-Yen
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Su, Hsin-Wen
In this work, we for the first time estimate total fluctuation resulting from random dopants (RDs), interface trap (ITs) and work functions (WKs) using experimentally calibrated 3D device simulation on 16-nm-gate high-kappa/metal gate devices. The total 3D simulated threshold voltage fluctuation (sigma V-th), induced by the aforementioned random sources simultaneously, is 55.5 mV for NMOS; however, a statistical total sum of these fluctuations is 12.3% overestimation because independence assumption on random variables is invalid owing to strong interactions among RDs, ITs and WKs. Device's DC/AC and CMOS SRAM circuit fluctuations have similar observation. FinFET-based structure innovation possessing large fluctuation suppression (sigma V-th = 30.2 mV; 45.6% reduction), compared with process efforts on planar one, is further discussed.
Characterization of the charge trapping properties in p-channel silicon-oxide-nitride-oxide-silicon memory devices including SiO2/Si3N4 interfacial transition layer
(2015-10-01)
Chiu, Yung-Yueh
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Yang, Bo-Jun
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Li, Fu-Hai
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Chang, Ru-Wei
;
Sun, Wein-Town
The role of SiO2/Si3N4 interfacial transition (IFT) layer in the oxide-nitride-oxide (ONO) tri-layer is quantitatively analyzed for the first time by simulating the temperature and stress-accelerated retention characteristics of p-channel silicon-oxide-nitride-oxide-silicon (SONOS) devices. The ONO tri-layer is modeled as an alloy-dielectric by changing the atomic concentration of silicon, oxygen and nitrogen. It is revealed that simulated results including the IFT layer are more consistent with the experimental data than those neglecting the IFT layer. In addition, the results show that the trapped charge density in IFT layer is two times larger than in the bulk Si3N4 film, due to the oxygen atoms penetrated from SiO2 cause the extrinsic defects in the IFT layer. The energy levels of the trapped charge are continuously distributed, and the peak value is similar to 1.6 eV below the conduction band of the ONO tri-layer with a full width at half maximum of 0.45 eV. (c) 2015 The Japan Society of Applied Physics
Dual-Material Gate Approach to Suppression of Random-Dopant-Induced Characteristic Fluctuation in 16 nm Metal-Oxide-Semiconductor Field-Effect-Transistor Devices
(2011-04-01)
Li, Yiming
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Lee, Kuo-Fu
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Yiu, Chun-Yen
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Chiu, Yung-Yueh
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Chang, Ru-Wei
In this work, we explore for the first time dual-material gate (DMG) and inverse DMG devices for suppressing the random-dopant (RD)-induced characteristic fluctuation in 16 nm metal-oxide-semiconductor field-effect-transistor (MOSFET) devices. The physical mechanism of suppressing the characteristic fluctuation of DMG devices is observed and discussed. The achieved improvement in suppressing the RD-induced threshold voltage, on-state current, and off-state current fluctuations are 28, 12.3, and 59%, respectively. To further suppress the fluctuations, an approach that combines the DMG method and channel-doping-profile engineering is also advanced and explored. The results of our study show that among the suppression techniques, the use of the DMG device with an inverse lateral asymmetric channel-doping-profile has good immunity to fluctuation. (C) 2011 The Japan Society of Applied Physics
Effects of Random Work Function Fluctuations in Nanoszied Metal Grains on Electrical Characteristic of 16 nm High-kappa/Metal Gate Bulk FinFETs
(2011)
Cheng, Hui-Wen
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Chiu, Yung-Yueh
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Li, Yiming
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電機學院
;
電子工程學系及電子研究所
In this work, the work function fluctuation (WKF) induced variability in 16-nm-gate planar MOSFET and bulk FinFET is for the first time explored and compared. Based upon an experimentally calibrated 3D device simulation, the newly developed localized WKF (LWKF) simulation technique enables us to estimate the threshold voltage and DC baseband fluctuations of devices which accounts for the random grain\'s number and position effects simultaneously. The results show that the random work function, resulting from local nanosized metal grains in bulk FinFET, induced relatively small threshold voltage (V-th) fluctuation (about 2.5 times lower), compared with the result of planar device.
Evaluation of the Role of Deep Trap State Using Analytical Model in the Program/Erase Cycling of NAND Flash Memory and Its Process Dependence
(2018-02-01)
Yang, Bo-Jun
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Wu, Yu-Ting
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Chiu, Yung-Yueh
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Kuo, Tse-Mien
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Chang, Jung-Ho
A method to analyze the kinetics of the charge accumulation in the tunnel oxide by the nand flash memory program and erase (P/E) cycling is proposed. Both electron trapping and detrapping processes are required to be considered owing to the oxide high electric field during P/E cycles. Consequently, the electron trapping in the deep trap state is concluded, whose trap energy (E-trap) is more than 3.5 eV. Furthermore, the as-grown trap state density (Ne), the trapping capture cross section (sigma), and the number of trapped positive charges can also be extracted to explain the tunneling current modulation and the V-T shift by oxide-trapped charges under the P/E stress. The trapped electrons are mainly distributed in the center of tunneloxide, and the distributed area extends as the P/E bias increases. In addition, the dependence of oxidation process is also shown. Both thermal dry and plasma oxidation have almost the same value of sigma (similar to 4x10(-17) cm(2)). However, 30% reduction of Ne is shown in plasma oxidation (similar to 1.25x10(19) cm(-3)) when compared with thermal dry oxidation (similar to 1.88 x 10(19) cm(-3)).
Impact of String Pattern on the Threshold-Voltage Spread of Program-Inhibited Cell in NAND Flash
(2016-07-01)
Chiu, Yung-Yueh
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Aoki, Minoru
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Yano, Masaru
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Shirota, Riichiro
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電機工程學系
An anomalous threshold-voltage (V-t) spread of the program-inhibited cell is investigated for the first time in NAND flash memory. The program disturb characteristics are studied by applying the program-inhibited stress on the Nth cell of the unselected bitline with various string patterns for the 0th to (N - 1)th cell, using the global self-boosting method. Distinguishing features of the variance of the number of injected electrons (sigma(2)(n)) into the floating gate are observed. The variance is proportional to the mean value of injected electrons ((n) over bar) times 10. The other is proportional to (n) over bar times 20 and occurs only when the (N - 1) th cell is programmed in a high Vt level and the other cells are in the erased state. A 3-D TCAD simulation reveals that the former case is attributed to Fowler-Nordheim tunneling from the insufficiently boosting channel, and the latter is explained by hot-electron injection owing to the strong lateral electric field between the Nth and (N - 1) th cells.
Interface traps and random dopants induced characteristic fluctuations in emerging MOSFETs
(2011-07-01)
Li, Yiming
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Cheng, Hui-Wen
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Chiu, Yung-Yueh
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傳播研究所
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電機工程學系
In this work, we study the effect of interface traps (ITs) and random dopants (RDs) on characteristics of 16-nm MOSFETs. Totally random generated devices with 2D ITs between the interface of silicon and HfO(2) film as well as 3D RDs inside the silicon channel are simulated. Fluctuations of threshold voltage and on/ off state current for devices with different EOT of insulator film are analyzed and discussed. The results of this study indicate ITs and RDs statistically correlate to each other and RDs govern device variability, compared with the influence of ITs. Notably, the position of ITs and RDs induces rather different fluctuation in spite of the same number of ITs and RDs are investigated. (C) 2011 Elsevier B.V. All rights reserved.
New Method to Analyze the Shift of Floating Gate Charge and Generated Tunnel Oxide Trapped Charge Profile in NAND Flash Memory by Program/Erase Endurance
(2015-01-01)
Shirota, Riichiro
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Yang, Bo-Jun
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Chiu, Yung-Yueh
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Chen, Hsuan-Tse
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Ng, Seng-Fei
A new test system was devised and used to separate the amount of floating gate (FG) charge (Q(FG)) from the oxide trapped charge (Q(OX)) generated by program-and-erase (P/E) cycles. We also extracted the pure V-mid shift caused by the generation of Q(OX), which is separated from the part of V-t shift coming from Q(FG) deviation. The identification of Q(FG) and Vmid shift makes it possible to analyze the detailed the oxide trapped charge profile. The Q(FG) shift generated by P/E cycles displays asymmetry between the programmed and erased states: the absolute value of Q(FG) exhibits a maximum at similar to 100 cycles in the programmed states, while Q(FG) monotonically decreases in the erased one. Considering that the Fowler-Nordheim tunneling current is sensitive to the oxide trap near the cathode, itself the source of electron tunneling current, our results indicate that the hole trap is dominant near to Si, whereas the electron trap is dominant near FG.
Study Trapped Charge Distribution in P-Channel Silicon-Oxide-Nitride-Oxide-Silicon Memory Device Using Dynamic Programming Scheme
(2013-04-01)
Li, Fu-Hai
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Chiu, Yung-Yueh
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Lee, Yen-Hui
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Chang, Ru-Wei
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Yang, Bo-Jun
In this study, we precisely investigate the charge distribution in SiN layer by dynamic programming of channel hot hole induced hot electron injection (CHHIHE) in p-channel silicon-oxide-nitride-oxide-silicon (SONOS) memory device. In the dynamic programming scheme, gate voltage is increased as a staircase with fixed step amplitude, which can prohibits the injection of holes in SiN layer. Three-dimensional device simulation is calibrated and is compared with the measured programming characteristics. It is found, for the first time, that the hot electron injection point quickly traverses from drain to source side synchronizing to the expansion of charged area in SiN layer. As a result, the injected charges quickly spread over on the almost whole channel area uniformly during a short programming period, which will afford large tolerance against lateral trapped charge diffusion by baking. (C) 2013 The Japan Society of Applied Physics
The effect of hydrogen on programmed threshold-voltage distribution in NAND flash memories
(2019-08-01)
Chiu, Yung-Yueh
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Lin, Cheng-Han
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Yang, Jhih-Siang
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Yang, Bo-Jun
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Aoki, Minoru
This paper, for the first time, presents a comprehensive study into the effect of hydrogen concentration in the forming gas on the reliability of NAND Flash memories. It is newly observed that a higher hydrogen concentration leads to broaden the threshold-voltage (V-T) distribution after programming. This suggests that a higher hydrogen concentration makes a larger amount of ionized hydrogens (H+) exist in the shallow trench isolation (STI), which results in the fluctuation of the Fowler-Nordheim tunneling current during programming. It is also found that the V-T distribution width difference between higher and lower hydrogen concentration turns out to be smaller after the program/erase cycling. This could be explained by the neutralization of H+ due to the capture of the tunneling electrons at the STI edge. On the other hand, the higher hydrogen concentration proves to be able to provide better retention characteristics. Thus, the programming and retention characteristics are the tradeoff relationship. Therefore, optimization of the hydrogen concentration is crucial for the NAND Flash process integration. (C) 2019 The Japan Society of Applied Physics
Transconductance Distribution in Program/Erase Cycling of NAND Flash Memory Devices: a Statistical Investigation
(2019-03-01)
Chiu, Yung-Yueh
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Lin, I-Chun
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Chang, Kai-Chieh
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Yang, Bo-Jun
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Takeshita, Toshiaki
A new method for characterizing the evolution of oxide charge (Q(T)) generation during program/erase (P/E) cycles is developed. The concentration of Q(T) can be separated from the floating gate charge (Q(FG)) by statistically analyzing the distribution of transconductance reduction (Delta G(m,max)) after P/E cycles. The effect of the number and position of discrete Q(T) on the distribution of Delta G(m,max) is studied. The cycling dependence of the Q(T) generation is given by a fractional equation that includes a power of the number of P/E cycles in the denominator. For fewer than 30k cycles, the equation can be simplified as a power-law equation in the number of cycles with a power factor of 0.58. For more than 30k cycles, the Q(T) generation gradually goes to a plateau value Q(0) = 1.5 x 10(20) cm(-3). It is indicated that the Q(T) generation is limited by the concentration of inherent weak bonding points inside SiO2 or the Si/SiO2 interface. The temperature dependence of the Q(T) generation is also provided. The activation energy (EA) of the Q(T) generation is approximately 0.1 eV, which is compatible with the EA value of electron traps creation in SiO2.