Browsing by Author "Chiu Yi-Te"

Now showing 1 - 4 of 4

DUAL-PORT SUBTHRESHOLD SRAM CELL
(2012-12-06)
Chiu Yi-Te
;
Chang Ming-Hung
;
Yang Hao-I
;
Hwang Wei
An innovative dual-port subthreshold static random access memory (SRAM) cell for sub-threshold voltage operation is disclosed. During write mode, the dual-port subthreshold SRAM cell would cut off the positive feedback loop of the inverters and utilize the reverse short-channel effect to enhance write capability. The single-ended read/write port structure further reduces power consumption of the lengthy bit line. Therefore, the dual-port subthreshold SRAM cell is a suitable for long operation in a first-in first-out memory system. Although the lower voltage reduces the stability of the memory cell, the dual-port subthreshold SRAM cell of the present invention can still stably operate.
Dual-port subthreshold SRAM cell
(2013-07-30)
Chiu Yi-Te
;
Chang Ming-Hung
;
Yang Hao-I
;
Hwang Wei
An innovative dual-port subthreshold static random access memory (SRAM) cell for sub-threshold voltage operation is disclosed. During write mode, the dual-port subthreshold SRAM cell would cut off the positive feedback loop of the inverters and utilize the reverse short-channel effect to enhance write capability. The single-ended read/write port structure further reduces power consumption of the lengthy bit line. Therefore, the dual-port subthreshold SRAM cell is a suitable for long operation in a first-in first-out memory system. Although the lower voltage reduces the stability of the memory cell, the dual-port subthreshold SRAM cell of the present invention can still stably operate.
STATIC RANDOM ACCESS MEMORY CELL AND METHOD OF OPERATING THE SAME
(2012-09-13)
Chiu Yi-Te
;
Chang Ming-Hung
;
Yang Hao-I
;
Hwang Wei
A static random access memory cell includes a latch unit. The latch unit includes a bi-inverting circuit and a switching circuit. The bi-inverting circuit has a first terminal and a second terminal. The switching circuit is electrically connected between the first terminal and the second terminal, wherein when the switching circuit is turned on, the switching circuit forms a feedback between the first terminal and the second terminal for latching the latch unit; and when the switching circuit is turned off, the feedback is removed to cause the SRAM cell to write a data bit to the latch unit.
Static random access memory cell and method of operating the same
(2013-05-07)
Chiu Yi-Te
;
Chang Ming-Hung
;
Yang Hao-I
;
Hwang Wei
A static random access memory cell includes a latch unit. The latch unit includes a bi-inverting circuit and a switching circuit. The bi-inverting circuit has a first terminal and a second terminal. The switching circuit is electrically connected between the first terminal and the second terminal, wherein when the switching circuit is turned on, the switching circuit forms a feedback between the first terminal and the second terminal for latching the latch unit; and when the switching circuit is turned off, the feedback is removed to cause the SRAM cell to write a data bit to the latch unit.