Browsing by Author "Chou, CW"

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Effects of channel width and NH3 plasma passivation on electrical characteristics of polysilicon thin-film transistors by pattern-dependent metal-induced lateral crystallization
(2005)
Wu, YC
;
Chang, TC
;
Chou, CW
;
Wu, YC
;
Liu, PT
This work studied the effects of channel width and NH3 plasma passivation on the electrical characteristics of a series of pattern-dependent metal-induced lateral crystallization (PDMILC) polysilicon thin-film transistors (poly-Si TFTs). The performance of PDMILC TFTs improves as each channel width decreasing. Further, PDMILC TFTs with NH3 plasma passivation outperforms without such passivation, resulting from the effective hydrogen passivation of the grain-boundary dangling bonds, and the pile-up of nitrogen at the SiO2/poly-Si interface. In particular, the electrical characteristics of a nanoscale TFT with ten 67 nm wide split channels (M10) are superior to those of other TFTs. The former includes a higher field effect mobility of 84.63 cm(2)/V s, a higher ON/OFF current ratio (> 10(6)), a steeper subthreshold slope (SS) of 230 mV/decade, and an absence of drain-induced barrier lowering (DIBL). These findings originate from the fact that the active channels of the M10 TFT have exhibit the most poly-Si grain enhanced to reduce the grain boundary defects and the best NH3 plasma passivation. Both effects can reduce the number of defects at grain boundaries of poly-Si in active regions for high performances. (c) 2005 The Electrochemical Society. All rights reserved.
High-performance metal-induced lateral-crystallization polysilicon thin-film transistors with multiple nanowire channels and multiple gates
(2006-05-01)
Wu, YC
;
Chang, TC
;
Liu, PT
;
Chou, CW
;
Wu, YC
In this study, pattern-dependent nickel (Ni) metal-induced lateral-crystallization (Ni-MILC) polysilicon thin-film transistors (poly-Si TFTs) with ten nanowire channels and multigate structure were fabricated and characterized. Experimental results reveal that applying ten nanowire channels improves the performance of an Ni-MILC poly-Si TFT, which thus has a higher ON current, a lower leakage current, and a lower threshold voltage (V-th) than single-channel TFTs. Furthermore, the experimental results reveal that combining the multigate structure and ten nanowire channels further enhances the entire performance of Ni-MILC TFTs, which thus have a low leakage current, a high ON/OFF ratio, a low Vth, a steep subthreshold swing, and kink-free output characteristics. The multigate structure with ten-nanowire-channel Ni-MILC TFTs has a few poly-Si grain boundary defects, a low lateral electrical field, and a gate-channel shortening effect, all of which are associated with such high-performance characteristics.
Mobility enhancement of polycrystalline-Si thin-film transistors using nanowire channels by pattern-dependent metal-induced lateral crystallization
(2005-10-03)
Wu, YC
;
Chang, TC
;
Liu, PT
;
Wu, YC
;
Chou, CW
This work presents a method for enhancing the mobility of polycrystalline-Si (poly-Si) thin-film transistors (TFTs) by pattern-dependent metal-induced-lateral-crystallization (PDMILC) using nanowire channels. Experimental results indicate that the field-effect mobility of PDMILC TFT was enhanced as the channel width decreased, because the lateral length of the poly-Si grains increased. The PDMILC poly-Si TFT with ten nanowire channels (M10) had the greatest field-effect mobility, 109.34 cm(2)/V s and the lowest subthreshold swing, 0.23 V/dec, at a gate length of 2 mu m. The field-effect mobility also increased as the gate length in the M10 PDMILC poly-Si TFT device declined, because the number of poly-Si grain-boundary defects was reduced. (C) 2005 American Institute of Physics.
Reduction of leakage current in metal-induced lateral crystallization polysilicon TFTs with dual-gate and multiple nanowire channels
(2005-09-01)
Wu, YC
;
Chang, TC
;
Liu, PT
;
Chou, CW
;
Wu, YC
This letter addresses the leakage current in nickel (Ni) metal-induced lateral crystallization (Ni-MILC) polysilicon thin-film transistors (poly-Si TFTs) with multiple nanowire channels and dual-gate. Experimental results reveal that applying multiple nanowire channels improves the Ni-MILC poly-Si TFT performance. However, the leakage current of both single-gate with single-channel and multiple nanowire channels remains high (> 10(-8) A), because of the field emission of carriers through the poly-Si grain traps and the defects caused by Ni contamination. Applying the dual-gate structure can suppress the electrical filed in the drain depletion region, significantly reducing the leakage current of the Ni-MILC poly-Si TFT, increasing the ON/OFF ratio.