Browsing by Author "Chou, Cheng Wei"

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METHOD FOR MANUFACTURING SELF-ALIGNED THIN-FILM TRANSISTOR AND STRUCTURE THEREOF
(2011-01-06)
Chou, Cheng Wei
;
Zan, Hsiao Wen
;
Tsai, Chuang Chuang
A method for manufacturing a self-aligned thin-film transistor (TFT) is described. Firstly, an oxide gate, a dielectric layer, and a photoresist layer are deposited on a first surface of a transparent substrate in sequence. Then, an ultraviolet light is irradiated on a second surface of the substrate opposite to the first surface to expose the photoresist layer, in which a gate manufactured by the oxide gate serves as a mask, and absorbs the ultraviolet light irradiated on the photoresist layer corresponding to the oxide gate. Then, the exposed photoresist layer is removed, and a transparent conductive layer is deposited on the unexposed photoresist layer and the dielectric layer. Then, a patterning process is executed on the transparent conductive layer to form a source and a drain, and an active layer is formed to cover the source, the drain, and the dielectric layer, so as to finish a self-aligned TFT structure.
New patterning method for pentacene-based TFTs by using AIN dielectric and O-2 plasma treatment
(2007)
Zan, Hsiao Wen
;
Tu, Ting Yuan
;
Chou, Cheng Wei
;
Yen, Kuo Hsi
;
Wang, Chung Hwa
Pentacene patterning on aluminum nitride (AIN) dielectric by adjusting the surface energy was discussed. By using conventional photo resist to protect the channel area, the surface energy of the remaining area was altered by the 02 plasma treatment. Then, after pentacene deposition, water dipping was used to remove the pentacene on 02 plasma-treated area. The adhesion energy, intrusion energy were analyzed to explain the mechanism of this patterning process. The variation of intrusion energy due to different surface energies was found to be the key issue for successful pentacene patterning. AIN-OTFTs with the proposed pentacene patterning technology were also demonstrated.