Browsing by Author "Chou, PC"

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Dual-band sigma-delta modulator for wideband receiver applications
(2004-02-01)
Chiang, JS
;
Chou, PC
;
Chang, TH
;
電控工程研究所
;
Institute of Electrical and Control Engineering
This work presents a new sigma-delta modulator (SDM) architecture for a wide bandwidth receiver. This architecture contains dualbandwidth for W-CDMA and GSM system applications. Low-distortion swing-suppressing SDM and interpolative SDM cascaded units are used together. Using the low-distortion swing-suppressing technique, the resolution can be improved even under non-linearity effects. The interpolative SDM extends the signal bandwidth and represses the high-band noise. The SDM used in the W-CDMA and GSM applications was designed and simulated using 0.25-mum 1P5M CMOS technology. The simulated peak SNDR of W-CDMA and GSM are 72/70 dB and 82/84 dB in Low-IF/Zero-IF standards.
Low distortion and swing suppression sigma-delta modulator with extended dynamic range scheme
(2005-11-01)
Chiang, JS
;
Chang, TH
;
Chou, PC
;
電控工程研究所
;
Institute of Electrical and Control Engineering
This work presents a new low distortion and swing suppression second order sigma-delta modulator with extended dynamic range scheme. The proposed modulator is based on the dual-quantizer architecture and can effectively extend the dynamic range by only adding two simple digital filters in the digital circuit. The techniques of low distortion and swing suppression integrator designs are also employed in the new architecture. Accordingly, this new architecture can improve the circuitry nonlinearity, and the in-band noise can be significantly suppressed to achieve a high resolution in mid or wide bandwidth applications. A second order SDM for Bluetooth application with bandwidth of 500 KHz and sampling frequency of 40 MHz was designed and implemented. The peak SNDR of the experimental SDM is 78 dB.