Browsing by Author "Chou, Shun-Tien"

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A 2.4 GHz Reference-Less Receiver for 1 Mbps QPSK Demodulation
(2012-03-01)
Chen, Wei-Zen
;
Lu, Tai-You
;
Ou, Wei-Wen
;
Chou, Shun-Tien
;
Yang, Song-Yu
A 2.4 GHz reference-less single chip wireless receiver for 1 Mbps QPSK demodulation is presented. The receiver accomplishes LO carrier recovery and data demodulation directly from the RF received signal without resort to resonator based reference, such as crystal oscillator. Integrating LNA, mixer, LO carrier recovery loop, postamplifier, and digital demodulator on a single chip, the total power consumption is 20.4 mW. The measured phase noise from a recovered carrier at 2.432 GHz is about -111 dBc/Hz at 1 MHz offset. The chip size is 1.75 x 1.55 mm(2).
A 2.4 GHz Reference-less Wireless Receiver for 1Mbps QPSK Demodulation
(2010)
Chen, Wei-Zen
;
Ou, Wei-Wen
;
Lu, Tai-You
;
Chou, Shun-Tien
;
Yang, Song-Yu
A 2.4 GHz reference-less single chip wireless receiver for 1Mbps QPSK demodulation is presented. The receiver accomplishes LO carrier recovery and data demodulation directly from the received RF signal without resort to resonator based reference, such as crystal oscillator. Integrating LNA, mixer, LO carrier recovery loop, post amplifier, and digital demodulator on a single chip, the total power consumption is 20.4mW. The measured phase noise from a recovered carrier at 2.432 GHz is about -112 dBc/Hz at 1 MHz offset. The chip size is 1.75 x 1.55 mm(2).
A 40 Gbps Optical Receiver Analog Front-End in 65 nm CMOS
(2012)
Chou, Shun-Tien
;
Huang, Shih-Hao
;
Hong, Zheng-Hao
;
Chen, Wei-Zen
;
電子工程學系及電子研究所
A 40 Gbps optical receiver analog front end integrating a trans-impedance amplifier (TIA) and a limiting amplifier is presented. To achieve wide band operation, nested feedback TIA and interleaving post amplifier with split series-peaking are proposed in this design. This receiver provides the transimpedance of 92 dBOhm, input-referred noise of 14 pA/root Hz, -3dB bandwidth of 35 GHz, and 800mV(pp) differential output voltage swing. The total power dissipation is 168 mW from 1.2-V supply. Fabricated in a 65 nm CMOS technology, the chip size is 0.825mm(2).