Browsing by Author "Datta, Suman"

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Investigation of impact ionization in InAs-channel HEMT ford high-speed and low-power applications
(2007-10-01)
Chang, Chia-Yuan
;
Hsu, Heng-Tung
;
Chang, Edward Yi
;
Kuo, Chien-I
;
Datta, Suman
An 80-nm InP high electron mobility transistor (HEMT) with InAs channel and InGaAs subchannels has been fabricated. The high current gain cutoff frequency (f(t)) of 310 GHz and the maximum oscillation frequency (f(max)) of 330 GHz were obtained at V-DS = 0.7 V due to the high electron mobility in the InAs channel. Performance degradation was observed on the cutoff frequency (f(t)) and the corresponding gate delay time caused by impact ionization due to a low energy bandgap in the InAs channel. DC and RF characterizations on the device have been performed to determine the proper bias conditions in avoidance of performance degradations due to the impact ionization. With the design of InGaAs/InAs/InGaAs composite channel, the impact ionization was not observed until the drain bias reached 0.7 V, and at this bias, the device demonstrated very low gate delay time of 0.63 ps. The high performance of the InAs/InGaAs HEMTs demonstrated in this letter shows great potential for high-speed and very low-power logic applications.
RF and logic performance improvement of In0.7Ga0.3As/InAs/In0.7Ga0.3As composite-channel HEMT using gate-sinking technology
(2008-04-01)
Kuo, Chien-I
;
Hsu, Heng-Tung
;
Chang, Edward Yi
;
Chang, Chia-Yuan
;
Miyamoto, Yasuyuki
Eighty-nanometer-gate In0.7Ga0.3As/InAs/ In0.7Ga0.3As composite-channel high-electron mobility transistors (HEMTs), which are fabricated using platinum buried gate as the Schottky contact metal, were evaluated for RF and logic application. After gate sinking at 250 degrees C for 3 min, the device exhibited a high g(m) value of 1590 mS/mm at V-d = 0.5 V, the current-gain cutoff frequency f(T) was increased from 390 to 494 GHz, and the gate-delay time was decreased from 0.83 to 0.78 ps at supply voltage of 0.6 V. This is the highest f(T) achieved for 80-nm-gate-length HEMT devices. These superior performances are attributed to the reduction of distance between gate and channel and the reduction of parasitic gate capacitances during the gate-sinking process. Moreover, such superior performances were achieved through a very simple and straightforward fabrication process with optimal epistructure of the device.