Browsing by Author "Edward Y."

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Growth of GaAs epitaxial layers on Si substrate by using a novel GeSi buffer layer
(2007-08-21)
Chang
;
Edward Y.
;
Luo
;
Guangli
;
Yang
This invention provides a process for growing Ge epitaxial layers on Si substrate by using ultra-high vacuum chemical vapor deposition (UHVCVD), and subsequently growing a GaAs layer on Ge film of the surface of said Ge epitaxial layers by using metal organic chemical vapor deposition (MOCVD).The process comprises steps of, firstly, pre-cleaning a silicon wafer in a standard cleaning procedure, dipping it with HF solution and prebaking to remove its native oxide layer. Then, growing a high Ge-composition epitaxial layer, such as Si0.1Ge0.9in a thickness of 0.8 μm on said Si substrate by using ultra-high vacuum chemical vapor deposition under certain conditions. Thus, many dislocations are generated and located near the interface and in the low of part of Si01.Ge0.9due to the large mismatch between this layer and Si substrate.Furthermore, a subsequent 0.8 μm Si0.05Ge0.95layer, and/or optionally a further 0.8 μm Si0.02Ge0.98layer, are grown. They form strained interfaces of said layers can bend and terminate the propagated upward dislocation very effectively. Therefore, a film of pure Ge is grown on the surface of said epitaxial layers.Finally, a GaAs epitaxial layer is grown on said Ge film by using MOCVD.
Method for fabricating nanometer gate in semiconductor device using thermally reflowed resist technology
(2005-09-13)
Chang
;
Edward Y.
;
Lee
;
Huang-Ming
The invention relates to a method for fabricating nanometer gate semiconductor device using thermally reflowed photoresist technology, comprising steps of (i) spin-coating two layers of photoresists on a substrate, where a bottom layer of photoresist is a polymeric photoresist having a lower sensitivity and a higher resolution, and a top layer of photoresist, is another polymeric photoresist having a higher sensitivity and a lower resolution, with respect to the electron beam; (ii) heating the photoresists for curing by way of using a hotplate; (iii) using photolithography in an electron beam direct writing manner to expose a pattern on the photoresists for forming a gate; (iv) using a developer and an etchant for developing and etching to form a recess on the gate; (v) plating a metallic layer on the recess of the gate using an electron gun evaporation technique; and (vi) removing the photoresists to obtain the gate, characterized in that after the etching of the recess of the gate, the photoresists are reflowed by using a hot plate heating manner within a predetermined period of time and temperature, such that the recess of the gate is formed with a nanometer-sized width.