Browsing by Author "Fan, C. C."

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Electrical instability of InGaZnO thin-film transistors with and without titanium sub-oxide layer under light illumination
(2017-03-01)
Chiu, Y. C.
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Zheng, Z. W.
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Cheng, C. H.
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Chen, P. C.
;
Yen, S. S.
The electrical instability behaviors of amorphous indium-gallium-zinc oxide thin-film transistors with and without titanium sub-oxide passivation layer were investigated under light illumination in this study. For the unpassivated IGZO TFT device, in contrast with the dark case, a noticeable increase of the sub-threshold swing was observed when under the illumination environment, which can be attributed to the generation of ionized oxygen vacancies within the alpha-IGZO active layer by high energy photons. For the passivated TFT device, the much smaller SS of similar to 70 mV/dec and high device mobility of >100 cm(2)/Vs at a drive voltage of 3 V with negligible degradation under light illumination are achieved due to the passivation effect of n-type titanium sub-oxide semiconductor, which may create potential application for high-performance display.
On the Electrical Characteristics of Ferroelectric FinFET Using Hafnium Zirconium Oxide with Optimized Gate Stack
(2018-10-27)
Lin, M. H.
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Fan, C. C.
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Hsu, H. H.
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Liu, C.
;
Chen, K. M.
We investigated a short-channel ferroelectric FinFET using a ferroelectric HfZrO thin film as gate dielectrics, and scaled down the channel length to 60 nm to study the short-channel effect and the ferroelectricity. The HfZrO FinFETs exhibited improved short-channel performance including subthreshold swing improvement and reduced drain-induced barrier lowering effect. By using pulsed I-V measurement method, we confirmed that the thickness tradeoff between HfZrO ferroelectric layer and buffered layer are critical to alleviate the influence of interface traps and simultaneously obtain the ferroelectricity in HfZrO FinFET devices with the consideration of sidewall traps. Interface traps may cause unwanted off-state leakage current and mismatching negative capacitance. Here, we demonstrated that the ferroelectric behavior can be achieved by simultaneously increasing HfZrO thickness to obtain the optimized polarization and adopt appropriate buffered layer to screen the traps effect under ferroelectric domain switching. (C) 2018 The Electrochemical Society.
The Impact of the Shallow-Trench Isolation Effect on Flicker Noise of Source Follower MOSFETs in a CMOS Image Sensor
(2018-06-01)
Fan, C. C.
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Chiu, Y. C.
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Liu, C.
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Lai, W. W.
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Cheng, C. H.
The flicker noise of source follower transistors is the dominant noise source in image sensors. This paper reports a systematic study of the shallow trench isolation effect in transistors with different sizes under high temperature conditions that correspond to the quantity of empty defect sites. The effects of shallow trench isolation sidewall defects on flicker noise characteristics are investigated. In addition, the low-frequency noise and subthreshold swing degrade simultaneously in accordance to the device gate width scaling. Both serious subthreshold leakage and considerable noise can be attributed to the high trap density near the STI edge. Consequently, we propose a coincidental relationship between the noise level and the subthreshold characteristic; its trend is identical to the experiments and simulation results.