Browsing by Author "Fan, Po-Chin"

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A dual phase charge pump with compact size
(2007-01-01)
Hsieh, Chun-Yu
;
Fan, Po-Chin
;
Chen, Ke-Horng
;
交大名義發表
;
National Chiao Tung University
In this paper, the regulated dual phase charge pump with compact size is presented. This charge pump uses the dual phase technique to reduce the output ripple and proposes a new power stage to define the stability of the overall system. This charge pump provides output voltage 5V and maximum load current 50mA with the constant frequency regulation. This design is based on TSMC 0.35 mu m 3.3V/5V CMOS technology.
A dual phase charge pump with compact size
(2007-01-01)
Hsieh, Chun-Yu
;
Fan, Po-Chin
;
Chen, Ke-Horng
;
交大名義發表
;
National Chiao Tung University
In this paper, the regulated dual phase charge pump with compact size is presented. This charge pump uses the dual phase technique to reduce the output ripple and proposes a new power stage to define the stability of the overall system. This charge pump provides output voltage 5V and maximum load current 50mA with the constant frequency regulation. This design is based on TSMC 0.35 mu m 3.3V/5V CMOS technology.
A dual-phase charge pump circuit with compact size
(2010-07-01)
Huang, Ming-Hsin
;
Hsieh, Chun-Yu
;
Fan, Po-Chin
;
Chen, Ke-Horng
;
電控工程研究所
In this paper, a regulated dual-phase charge pump with compact size is presented. By means of a nano-ampere switched-capacitor voltage reference (SCVR) circuit, the dual-phase charge pump regulator can reduce the quiescent current and the output ripple. Besides, a new power stage is proposed to define the stability of the overall system. Owing to the design of buffer stage, the charge pump regulator can extend bandwidth and increase phase margin. Thus, the transient response and driving capability can be improved. Beside, the proposed automatic body switching circuit can efficiently drive the bulk of the power p-type MOSFETs to avoid leakage and potential latch-up. This chip was fabricated by TSMC 0.35 mu m, 3.3 V/5 V 2P4 M CMOS technology. The input voltage range varies from 2.9 to 4.9 V for the lithium battery and the output voltage is regulated at 5 V. Experimental results demonstrate the charge pump can provide 50 mA maximum load current without any oscillation problems.
Low-Ripple and Dual-Phase Charge Pump Circuit Regulated by Switched-Capacitor-Based Bandgap Reference
(2009-05-01)
Huang, Ming-Hsin
;
Fan, Po-Chin
;
Chen, Ke-Horng
;
電控工程研究所
;
Institute of Electrical and Control Engineering
This paper proposes a low-ripple and dual-phase charge pump circuit regulated by switched-capacitor-based bandgap reference. Due to design of a buffer stage, a system can have better bandwidth and phase margin, and thus, the transient response and driving capability can be improved. Besides, the dual-phase control can reduce the output voltage ripple by means of only one closed-loop regulation in order to improve the power conversion efficiency. Besides, the proposed automatic body switching (ABS) circuit can efficiently drive the bulk of the power p-type MOSFETs to avoid leakage and potential latch-up. Usually, the regulated charge pump circuit needs a bandgap reference circuit to provide a temperature-independent reference voltage. The switched-capacitor-based bandgap reference circuit is utilized to regulate the output voltage. This chip was fabricated by Taiwan Semiconductor Manufacturing Company (TSMC) 0.35 mu m 3.3 V/5V 2P4M CMOS technology. The input voltage range varies from 2.9 to 5.5 V, and the output voltage is regulated at 5 V Experimental results demonstrate that the charge pump can provide 48 mA maximum load current without any oscillation problems.