Browsing by Author "Frohlich, Karol"

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3D resistive RAM cell design for high-density storage class memory-a review
(2016-06)
Hudec, Boris
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Hsu, Chung-Wei
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Wang, I-Ting
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Lai, Wei-Li
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Chang, Che-Chia
In this article, we comprehensively review recent progress in the ReRAM cell technology for 3D integration focusing on a material/device level. First we briefly mention pioneering work on high-density crossbar ReRAM arrays which paved the way to 3D integration. We discuss the two main proposed 3D integration schemes-3D horizontally stacked ReRAM vs 3D Vertical ReRAM and their respective advantages and disadvantages. We follow with the detailed memory cell design on important work in both areas, utilizing either filamentary or interface-limited switching mechanisms. We also discuss our own contributions on HfO2-based filamentary 3D Vertical ReRAM as well as TaOx/TiO2 bilayer-based self-rectifying 3D Vertical ReRAM. Finally, we summarize the present status and provide an outlook for the nearterm future.
Interface engineered HfO2-based 3D vertical ReRAM
(2016-06-02)
Hudec, Boris
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Wang, I-Ting
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Lai, Wei-Li
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Chang, Che-Chia
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Jancovic, Peter
We demonstrate a double-layer 3D vertical resistive random access memory (ReRAM) stack implementing a Pt/HfO2/TiN memory cell. The HfO2 switching layer is grown by atomic layer deposition on the sidewall of a SiO2/TiN/SiO2/TiN/SiO2 multilayer pillar. A steep vertical profile was achieved using CMOS-compatible TiN dry etching. We employ in situ TiN bottom interface engineering by ozone, which results in (a) significant forming voltage reduction which allows for forming-free operation in AC pulsed mode, and (b) non-linearity tuning of low resistance state by current compliance during Set operation. The vertical ReRAM shows excellent read and write disturb immunity between vertically stacked cells, retention over 10(4) s and excellent switching stability at 400 K. Endurance of 10(7) write cycles was achieved using 100 ns wide AC pulses while fast switching speed using pulses of only 10 ns width is also demonstrated. The active switching region was evaluated to be located closer to the bottom interface which allows for the observed high endurance.
Three dimensional integration of ReRAMs
(2018-01-01)
Hudec, Boris
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Chang, Che-Chia
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Wang, I-Ting
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Frohlich, Karol
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Hou, Tuo-Hung
Storage-class memory, non-volatile, ultra-dense and lightning fast, may enable memory-driven computing to revolutionize the current architectures leading to an on-chip processing of vast amount of data. 3D vertical resistive random access memory (ReRAM) is a hot candidate for storage-class memory. In this talk we review current state-of-the-art works which offer promising solutions, utilizing either filamentary or non-filamentary ReRAM designs, including our own. We will discuss the pros and cons of different approaches and summarize the open problems, drawing possible solutions.