Browsing by Author "Gu, SH"

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Characterization of programmed charge lateral distribution in a two-bit storage nitride flash memory cell by using a charge-pumping technique
(2006-01-01)
Gu, SH
;
Wang, TH
;
Lu, WP
;
Ting, WC
;
Ku, YHJ
In this paper, we use a modified charge pumping technique to characterize the programmed charge lateral distribution in a hot electron program/hot hole erase, two-bit storage nitride Flash memory cell. The stored charge distribution of each bit over the source/drain junctions can be profiled separately. Our result shows that the second programmed bit has a broader stored charge distribution than the first programmed bit. The reason is that a large channel field exists under the first programmed bit during the second bit programming. Such a large field accelerates channel electrons and causes earlier electron injection into the nitride. In addition, we find that programmed charges spread further into the channel as program/erase cycle number increases.
Investigation of programmed charge lateral spread in a two-bit storage nitride flash memory cell by using a charge pumping technique
(2004)
Gu, SH
;
Wang, MT
;
Chan, CT
;
Zous, NK
;
Yeh, CC
The lateral distribution of programmed charge in a hot electron program/hot hole erase nitride storage flash cell is investigated by using a charge pumping technique. Our study shows that the secondly programmed bit has a wider trapped charge distribution than the first programmed bit. In addition, we find prograrnmed charge spreads further into the channel with program/erase cycle number.
Soft breakdown enhanced hysteresis effects in ultra-thin oxide SOI nMOSFETs
(2002)
Chen, MC
;
Tsai, CW
;
Gu, SH
;
Wang, TH
;
電子工程學系及電子研究所
The impact of soft breakdown location on V, hysteresis in partially depleted SOI nMOSFETs with ultra-thin oxide (1.6nm) is investigated. Two breakdown enhanced hysteresis modes are identified. In a channel breakdown MOSFET, excess holes attributed to valence electron tunneling flow to the floating body and thus cause V, hysteresis in gate bias switching. As a contrast, in a drainedge breakdown device, enhanced V, hysteresis is observed during drain bias switching because of increased band-to-band tunneling current.
Substrate bias dependence of breakdown progression in ultrathin oxide pMOSFETs
(2003-04-01)
Tsai, CW
;
Chen, MC
;
Gu, SH
;
Wang, T
;
電子工程學系及電子研究所
Negative substrate bias-enhanced oxide breakdown (BD) progression in ultrathin oxide (1.4 nm) pMOS is observed. The enhanced progression is attributed to the increase of hole-stress current resulting from BD-induced, channel-carrier heating. The carrier temperature extracted from the spectral distribution of hot-carrier luminescence is around 1300 K. The substrate bias dependence of post-BD hole-tunneling current is confirmed from measurement and calculation. The observed phenomenon is particularly significant to ultrathin gate oxide reliability in floating substrate (SOI) and forward-biased substrate devices.
Valence-band tunneling enhanced hot carrier degradation in ultra-thin oxide nMOSFETs
(2000)
Tsai, CW
;
Gu, SH
;
Chiang, LP
;
Wang, TH
;
Liu, YC
Enhanced hot carrier degradation with stress V-g in the valence-band tunneling regime is observed. This degradation is attributed to channel hole creation by valence-band electron tunneling. The created holes provide for Auger recombination with electrons in the channel and thus increase hot electron energy. The valence-band tunneling enhanced hot carrier degradation becomes more serious as gate oxide thickness is reduced. In ultra-thin gate oxide nMOSFETs, our result shows that the valence-band tunneling enhanced degradation, as opposed to max. Tb stress induced degradation, exhibits positive dependence on substrate bias. This phenomenon may cause a severe reliability issue in positively biased substrate or floating substrate devices.