Browsing by Author "HUANG, CY"

Now showing 1 - 3 of 3

ANALYTICAL DESIGN FORMULATION FOR MINORITY-CARRIER WELL-TYPE GUARD RINGS IN CMOS CIRCUITS
(1993-06-01)
CHEN, MJ
;
HUANG, CY
;
TSENG, PN
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
Minority carriers injected from an active emitter into the substrate and partially collected by the bottom well junction in an epitaxial CMOS structure are studied. Two-dimensional numerical simulation has revealed that the minority-carrier collection current along the bottom well junction is contributed primarily by two mechanisms: the first due to minority carriers injected into a layer between the upper collecting plate and the bottom reflecting plate; and the second due to those penetrating the high/low junction and then spreading out in the large, highly-doped bulk as in the nonepitaxial case. Based on this observation, a new analytic model for the minority-carrier escape current has been developed as a measure of well-type guard ring efficiency. This model, including a closed-form expression as function of epitaxial layer thickness, well junction depth and guard ring width, has been confirmed by experimental data as well as by two-dimensional numerical simulation. As predicted by the model, the measured escape current has been found to be dominated by the second mechanism for the case of well junction depth close to epitaxial layer thickness while the first mechanism has been identified to dominate the escape current measured from the structure having sufficient epitaxial layer thicknesses.
DESIGN-MODEL AND GUIDELINE FOR N-WELL GUARD RING IN EPITAXIAL CMOS
(1994-10-01)
HUANG, CY
;
CHEN, MJ
;
電子工程學系及電子研究所
;
電控工程研究所
;
Department of Electronics Engineering and Institute of Electronics
This work reports the development of design model for n-well guard rings in a CMOS process utilizing a low-doped epitaxial layer on a highly doped substrate. The validity of the model has been judged by a wide range of experimental data measured from the fabricated n-well guard ring structures with guard ring width as parameter. From the model developed, guideline has been drawn to minimize the guard ring width while critically suppressing the amount of electrons escaping from guard ring.
LOW-TEMPERATURE ACTIVATION AND RECRYSTALLIZATION OF B+-IMPLANTED AND BF2+-IMPLANTED LPCVD AMORPHOUS-SI FILMS
(1995-10-01)
CHENG, HC
;
WANG, FS
;
HUANG, YF
;
HUANG, CY
;
TSAI, MJ
Low-temperature (600 degrees C) activation and recrystallization of the low-pressure chemical vapor deposition (LPCVD) amorphous-Si films B+- and BF2+-implanted with different implantation dosages and projection ranges have been investigated. The boron dopant in the amorphous-Si layer can enhance the recrystallization, resulting in the shorter incubation time and smaller grain size then the undoped specimens. For the BF2+-implanted specimens, the existence of fluorine atoms could postpone the grain nucleation, leading to the longer incubation time and slower nucleation rate for the heavily doped specimens than the undoped ones. For the BF2+-implanted specimens, as the implantation peak reaches to the alpha-Si/SiO2 interface, the recoiled oxygen atoms from the oxide substrate would retard the grain nucleation and exhibit a significantly large grain size after a long time annealing. However, the recoiled oxygen atoms and the microdefects in the poly-Si layers would offset the improvement in hole mobility. Higher hole mobilities and lower trap state densities were also observed for the BF2+-implanted specimens with respect to the B+-implanted ones. It is attributed to the passivation effect of fluorine atoms within the poly-Si layers.