Browsing by Author "Hou, Fu-Ju"

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32-nm Multigate Si-nTFET With Microwave-Annealed Abrupt Junction
(2016-05)
Hou, Fu-Ju
;
Sung, Po-Jung
;
Hsueh, Fu-Kuo
;
Wu, Chien-Ting
;
Lee, Yao-Jen
Microwave annealing (MWA) activates dopants through solid-phase epitaxial regrowth with low thermal budget. Optimizing the microwave power during MWA is capable of realizing low defect density at the junction, suppressing the dopant diffusion, and mitigating the straggle effect of ion implantation. These favorable features of MWA facilitate the formation of extremely abrupt junction profiles in tunnel FETs (TFETs). In conjunction with the improved gate-to-channel controllability of the multiple-gate (MG) structure, we demonstrate high-performance lateral n-type Si-TFETs using a CMOS-compatible process flow with excellent band-to-band tunneling efficiency and device scalability. The 32-nm MG Si-TFET shows promising characteristics, including a high ON-state current of 41.3 mu A/mu m, a large current ON/OFF ratio of > 5 x 10(7), and minimal short-channel effect using V-G = 2 V and V-D = 1 V.
Diamond-shaped Ge and Ge0.9Si0.1 Gate-All-Around Nanowire FETs with Four {111} Facets by Dry Etch Technology
(2015)
Lee, Yao-Jen
;
Hou, Fu-Ju
;
Chuang, Shang-Shiun
;
Hsueh, Fu-Kuo
;
Kao, Kuo-Hsing
We propose a feasible pathway to scale the Ge MOSFET technology by using a novel diamond-shaped Ge and Ge0.9Si0.1 gate-all-around (GAA) nanowire (NW) FETs with four {111} facets. The device fabrication requires only simple top-down dry etching and blanket Ge epitaxy techniques readily available in mass production. The proposed dry etching process involves three isotropic/anisotropic etching steps with different Cl-2/HBr ratios for forming the suspended diamond-shaped channel. Taking advantages of the GAA configuration, favorable carrier mobility of the {111} surface, nearly defect-free suspended channel, and improved dopant activation by incorporating Si, nFET and pFET with excellent performance have been demonstrated, including an I-on/I-off ratio exceeding 10(8), the highest ever reported for Ge-based pFETs.
Fabrication and characterization of three-dimensional all metallic photonic crystals for near infrared applications
(2009-01-26)
Yang, Yu-Lin
;
Hou, Fu-Ju
;
Wu, Shich-Chuan
;
Huang, Wen-Hsien
;
Lai, Ming-Chih
Three-dimensional all metallic photonic crystals with a feature size of 0.20 mu m were fabricated using electron-beam lithography with the photoresist of hydrogen silesquioxane. This process method has high compatibility with the fabrication of damascene copper interconnections and also simplifies the whole process flow. The dependence of the complete photonic band gaps on polarization was experimentally observed and compared with the simulation results. The band edge for the four-layer lattice was found at a wavelength of around 0.80 mu m in normal incidence.
Growth enhancement and field emission characteristics of one-dimensional 3,4,9,10-perylenetetracarboxylic dianhydride nanostructures on pillared titanium substrate
(2007-10-01)
Suen, Shich-Chang
;
Whang, Wha-Tzong
;
Hou, Fu-Ju
;
Dai, Bau-Tong
;
材料科學與工程學系
We have utilized the pi-pi interactions between 3,4,9, 1 0-perylenetetracarboxylic dianhydride (PTCDA) molecules and temperature-induced morphology changes to synthesize one-dimensional (ID) nanostructures of PTCDA on a heated (ca. 100 degrees C) titanium substrate through vacuum sublimation. Because of the pillared Ti structures and the presence of reactive Ti-Cl sites, the titanium substrate played a crucial role in assisting the PTCDA molecules to form ID nanostructures. The average diameter of the nanofibers deposited on the Ti-CVD substrate, a Ti substrate formed by chemical vapor deposition (CVD), at 100 degrees C was ca. 84 run, with lengths ranging from 100 nm to 3 mu m. When the PTCDA nanofibers were biased under vacuum, the emission current remained stable. The turn-on electric field for producing a current density of 10 mu A/cm(2) was 8 V/mu m. The maximum emission current density was 1.3 mA/cm(2), measured at 1100 V (E = 11 V/mu m). From the slope of the straight line obtained after plotting ln(J/E-2) versus 1/E, we calculated the field enhancement factor beta to be ca. 989. These results demonstrate the PTCDA nanofibers have great potential for applicability in organic electron-emitting devices. (C) 2007 Elsevier B.V. All rights reserved.
High Performance Poly Si Junctionless Transistors with Sub-5nm Conformally Doped Layers by Molecular Monolayer Doping and Microwave Incorporating CO2 Laser Annealing for 3D Stacked ICs Applications
(2015)
Lee, Yao-Jen
;
Cho, Ta-Chun
;
Sung, Po-Jung
;
Kao, Kuo-Hsing
;
Hsueh, Fu-Kuo
A junctionless (JL) fin thin film transistor (FinTFT) with a novel shell doping profile (SDP) formed by a damage-free conformal molecular monolayer doping (MLD) method and a combination of microwave annealing (MWA) and CO2 laser spike annealing (COLSA) is demonstrated and studied. MWA drives in and partially activates the MLD dopants; the resultant SDP features an ultra-shallow depth (< 5nm) and an abrupt steepness (< 0.8 nm/dec). The dopant activation of the devices experienced MLD and MWA is further enhanced by the nonmelting COLSA without dopant diffusion, and which can also avoid fin deformation and recover surface defects left by fin patterning. Thanks to the enhanced dopant activation by COLSA, the SDP-FinTFTs overall exhibit better performance than the SDP-FinTFTs without COLSA and the conventional implanted (imp) FinTFTs in terms of subthreshold swing (S.S.), on-currents (I-on by 160% compared to the SDP-FinTFTs without COLSA) and on/off current ratio (I-on/I-off > 10(7)) for 3D stacked ICs applications. Our results reveal the potential of the proposed SDP formed by MLD, MWA and COLSA enabling a JLFinTFT showing excellent performance.
High-Performance Uniaxial Tensile Strained n-Channel JL SOI FETs and Triangular JL Bulk FinFETs for Nanoscaled Applications
(2017-05-01)
Sung, Po-Jung
;
Cho, Ta-Chun
;
Hou, Fu-Ju
;
Hsueh, Fu-Kuo
;
Chung, Sheng-Ti
In this paper, one proposed an effective method to enhance current drivability of junctionless FETs (JL-FETs) by utilizing uniaxial tensile strain effects. The strained layers were deposited on JL-FETs on silicon-on-insulator (SOI) and bulk Si wafers, respectively. Strained JL SOI FETs show an extremely low subthreshold swing (S. S.) of 65 mV/decade with ION/IOFF > 10(9); strained JL bulk FinFETs show an S. S. of 75 mV/decade with I-ON/I-OFF > 10(7). For strained JL bulk FinFETs, a triangular fin shape could suppress leakage current effectively. Regardless of substrates, JL FETs showed excellent performance owing to uniaxial tensile strain technology. Analysis of leakage current in strained JL FETs included effects on Gate-induced drain leakage trap-assisted tunneling effects were discussed by ID-VG curves under various temperatures and activation energy. Compared with JL SOI gate-all-around structures, JL bulk FinFET possesses higher ID and offer the promise of higher integration flexibility for Si CMOS compatible process for the future applications.
Low-temperature self-assembly of copper phthalocyanine nanofibers
(2006-10-01)
Suen, Shich-Chang
;
Whang, Wha-Tzong
;
Hou, Fu-Ju
;
Dai, Bau-Tong
;
材料科學與工程學系
This paper describes a method for producing ID organic nanofibers by exploiting intermolecular dispersive forces during the self-assembly of CuPc molecules. The average length of these CuPc nanofibers deposited at 100 degrees C, a temperature much lower than that required for the synthesis of carbon nanotubes, was ca. 500 nm, with diameters in the range 1550 nm. XRD analysis of these nanofibers revealed that they possessed an alpha phase structure. HRTEM images indicated that the CuPc nanofibers formed through layered stacking of CuPc molecules. These CuPc nanofibers exhibit field emission characteristics (with a turn-on field of 13.6 V/mu m) and follow Fowler-Nordheim behavior in a manner similar to that of carbon nanotubes. The stable emission current and relative simplicity of their synthesis suggest a broad range of applications for CuPc nanofibers in nanoscience and nanotechnology. (C) 2006 Elsevier B.V. All rights reserved.
Record-high 121/62 mu A/mu m on-currents 3D stacked epi-like Si FETs with and without metal back gate
(2013)
Yang, Chih-Chao
;
Chen, Szu-Hung
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Shieh, Jia-Min
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Huang, Wen-Hsien
;
Hsieh, Tung-Ying
A sequential layered integration technology that can fabricate 3D stackable epi-like Si FETs with and without metal back gate (MBG) under sub-400 degrees C are proposed in this article. With laser crystallized epi-like Si and CMP thinning processes for channel fabrication, 3D stackable ultra thin body (UTB) n/p-MOSFETs with low-subthreshold swings (88 and 121 mV/dec.) and high on-currents (121 and 62 liA/Iim) are demonstrated. With additional metal back gate structure, UTB devices can be desirably operated in a positive or negative threshold voltage range with gamma values of 0.51 (n-MOSFETs) and 0.56 (p-MOSFETs) for favoring its applications in 3D logic circuits. In addition, such thin and high quality channel and metal back gate scheme is not only promising for conventional p-n junction device but also junctionless (JL) scheme, which can simplify the fabrication and achieve further scaling.
Suspended Diamond-Shaped Nanowire With Four {111} Facets for High-Performance Ge Gate-All-Around FETs
(2016-10)
Hou, Fu-Ju
;
Sung, Po-Jung
;
Hsueh, Fu-Kuo
;
Wu, Chien-Ting
;
Lee, Yao-Jen
A feasible pathway to scale germanium (Ge) FETs in future technology nodes has been proposed using the tunable diamond-shaped Ge nanowire (NW). The Ge NW was obtained through a simple top-down dry etching and blanket Ge epitaxy techniques readily available in mass production. The different etching selectivity of surface orientations for Cl-2 and HBr was employed for the three-step isotropic/anisotropic/isotropic dry etching. The ratio of Cl-2 and HBr, mask width, and Ge recess depth were crucial for forming the nearly defect-free suspended Ge channel through effective removal of dislocations near the Si/Ge interface. This technique could also be applied for forming diamond-shaped Si NWs. The suspended diamond-shaped NW gate-all-around NWFETs feature excellent electrostatics, the favorable {111} surfaces along the < 110 > direction with high carrier mobility, and the nearly defect-free Ge channel. The pFET with a high I-ON/I-OFF ratio of 6 x 10(7) and promising nFET performance have been demonstrated successfully.