Browsing by Author "Hsieh, Dong-Ru"

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Comprehensive Analysis on Electrical Characteristics of Pi-Gate Poly-Si Junctionless FETs
(2017-07-01)
Hsieh, Dong-Ru
;
Lin, Jer-Yi
;
Kuo, Po-Yi
;
Chao, Tien-Sheng
;
電子物理學系
In this paper, the electrical characteristics of the Pi-gate junctionless FETs (PG JL FETs) with the in situ n(+) doped poly-Si (DP-Si) fin-channels have been experimentally investigated and comprehensively discussed. The subthreshold behavior and threshold voltage of the PG JL FETs are sensitive to the channel dimensions, especially the channel width. The crystallinity, carrier mobility, and effective carrier concentration in the DP-Si films are dependent on the initial DP-Si film thicknesses, which directly influence the on current and threshold voltage of the PG JL FETs. Based on an evaluation on the subthreshold behavior and the driving current, we found that the PG JL FETs with the low/high aspect ratio (A.R. = channel thickness/channel width) are separately suitable for the low-power/high-performance applications. Among these PG JL FETs, the device with a proper A.R. (3.35) exhibits a relatively steep subthreshold swing (S.S.) of 66 mV/decade and the highest (ON)/(OFF) currents ratio (I-ON/I-OFF) of 1.2 x 10(8) (VD = 1 V). These devices are very promising candidates for future multifunctional 3-D integrated circuit applications.
High-Performance Pi-Gate Poly-Si Junctionless and Inversion Mode FET
(2016-11)
Hsieh, Dong-Ru
;
Lin, Jer-Yi
;
Kuo, Po-Yi
;
Chao, Tien-Sheng
;
電子物理學系
In this paper, the Pi-gate (PG) poly-Si junctionless (JL) and inversion mode (IM) FETs with a high aspect ratio (A.R. = channel thickness/channel width similar to 3.4) have been successfully fabricated and demonstrated by a method without using the costly lithography technique. This method has some advantages: 1) the thickness of channels can be controlled simply by thickness of poly-Si layer; 2) the shape of channels can be controlled effectively by rectangular silicon nitride (Si3N4) as hard masks; 3) the series resistance can be reduced by raised source/drain configurations; and 4) Si-compatible low thermal budget process. The PG polySi JL FETs show excellent electrical performance in terms of low gate overdrive voltage (V-G-V-TH = 2 V), extremely nearideal subthreshold swing (S.S.) similar to 68 mV/decade, steep average subthreshold swing (A.S.S.) similar to 73 mV/decade, smaller drain-induced barrier lowering similar to 9 mV/V, a higher ON/OFF current ratio similar to 1.1 x 10(8) (VD = 1 V), and a better field-effect mobility (mu(FE)) similar to 35 (cm(2)/Vs) as compared with PG poly-Si IM FETs. Thus, these devices are very promising for future 3-D integrated circuits applications.
High-performance sidewall damascened tri-gate poly-si TFTs with the strain proximity free technique and stress memorization technique
(2017-02)
Hsieh, Dong-Ru
;
Kuo, Po-Yi
;
Lin, Jer-Yi
;
Chen, Yi-Hsuan
;
Chang, Tien-Shun
In this paper, strained channel-sidewall damascened tri-gate polycrystalline silicon thin-film transistors (SC-SWDTG TFTs) have been successfully fabricated and then demonstrated by an innovative process flow. This process flow without the use of advanced lithography processes combines the sidewall damascened technique (SWDT) and two strain techniques, namely, the strain proximity free technique (SPFT), and the stress memorization technique (SMT), in the poly-Si channels. It has some advantages: (1) the channel shapes and dimensions can be effectively controlled by the wet etching processes and the deposition thickness of the tetraethoxysilane (TEOS) oxide; (2) the source/drain (S/D) resistance can be significantly decreased by the formation of the raised S/D structures; (3) the SPFT, SMT, and the rapid thermal annealing (RTA) treatment can enhance the performance of the SC-SWDTG TFTs without the limitation of the highly scaling stress liner thickness in deep-submicron TFTs. Thus, the SC-SWDTG TFTs exhibit a steep subthreshold swing (S.S.) similar to 110mV/dec., an extremely small drain induced barrier lowing (DIBL) similar to 12.2mVV(-1), and a high on/off ratio similar to 10(7) (V-D = 1V) without plasma treatments for future three-dimensional integrated circuits (3D ICs) applications.
Investigation of Channel Doping Concentration and Reverse Boron Penetration on P-Type Pi-Gate Poly-Si Junctionless Accumulation Mode FETs
(2018-01-01)
Hsieh, Dong-Ru
;
Chan, Yi-De
;
Kuo, Po-Yi
;
Chao, Tien-Sheng
;
電子物理學系
In this paper, the influence of channel doping concentration and reverse boron penetration on p-type Pi-gate (PG) poly-Si junctionless accumulation mode (JAM) FETs has been experimentally investigated and discussed. Effective carrier concentration (N-eff) and threshold voltage (V-TH) are found to be sensitive to doping concentration. Moreover, the positive shift in V-TH and the degradation in the subthreshold behavior for PG JAM FETs are observed after an additional source/drain (S/D) activation process. Using a low thermal-budget S/D activation process, PG JAM FETs with a suitable channel doping concentration can show excellent electrical characteristics: 1) steep subthreshold swing of 86 mV/dec.; 2) low average subthreshold swing (A.S.S.) of 96 mV/dec.; and 3) high ON/OFF current ratio (I-ON/I-OFF) of 7.7 x 10(7) (I-ON at V-G - V-TH = -2 V and V-D = -1 V).
Investigation of Nitrous Oxide Nitridation Temperatures on P-Type Pi-Gate Poly-Si Junctionless Accumulation Mode TFTs
(2019-01-01)
Hsieh, Dong-Ru
;
Lin, Kun-Cheng
;
Chao, Tien-Sheng
;
電子物理學系
;
Department of Electrophysics
In this paper, the influence of nitrous oxide (N2O) nitridation temperatures on p-type Pi-gate (PG) poly-Si junctionless accumulation mode (JAM) TFTs is experimentally investigated. The tetraethoxysilane (TEOS) gate oxide quality for PG JAM TFTs can be significantly improved by increasing N2O nitridation temperatures (TN) from 700 degrees C to 800 degrees C in N2O ambient, resulting in the improvement of average subthreshold swing (A.S.S.), increase of on current (ION), and enhancement of TEOS gate oxide breakdown E-field (E-OBD). PG JAM TFTs by means of a proper channel doping concentration (N-ch = 5 x 10(18) cm(-3)) and a suitable TN (800 degrees C) exhibit a steep A.S.S. similar to 96 mV/dec. and a large E-OBD similar to 12.1 MV/cm.