Browsing by Author "Hsieh, Yi-Chun"
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Item type:Item, Finite Element Analysis of an Ultrasonic Vibration Device at High Temperatures(2016-06) ;Lan Phuong Nguyen ;Tsai, Yen-Pin ;Hung, Jung-Chung ;Hsieh, Yi-ChunHung, ChinghuaUltrasonic-vibration-assisted forming has been extensively adopted in plastic manufacturing processes. Ultrasonic vibration contributes to enhancing material formability and product quality and to reducing manufacturing costs by improving frictional conditions and increasing the temperature of materials. However, designing a suitable ultrasonic vibration system for processes conducted at high working temperatures, such as the ultrasonic vibration-assisted glass hot embossing process, is difficult because of complex thermal boundaries and material properties. In this study, an ultrasonic vibration system that can be used at high working temperatures was analyzed using the finite element method and ANSYS commercial software. The simulation results obtained from thermal, modal, and harmonic response analyses were compared with experimental measurements to confirm the validity of the numerical analysis. The resulting finite element module can be used in designing the components of ultrasonic vibration devices that can be used at high working temperatures.Item type:Item, Signal Generation Techniques in CMOS for Millimeter-Wave and Terahertz Applications(2019-01-01) ;Hsieh, Cuei-Ling ;Lin, Jung-Hsun ;Yang, Chieh-Ying ;Hsieh, Yi-ChunChen, Hong-ShenThis paper presents the design of three millimeter-wave and terahertz signal sources that demonstrates the feasibility of high performance signal source implemented in CMOS. A triple-push oscillator consisted of two antiparallel LC ring oscillators is presented with a low phase noise of -88 dBc/Hz at 1-MHz offset and a peak output power of -6 dBm at 210 GHz in a 90-nm CMOS process. An injection locked quadruple-push oscillator is then presented with a simulated output power of -16.3 dBm at 336 GHz and phase noise of -88 dBc/Hz at fundamental frequency in a 90-nm CMOS process. Lastly, a 330-GHz subharmonic injection locked frequency synthesizer is proposed. The core oscillator is based on the triple-push architecture. The frequency synthesizer achieves a simulated locking range of 5 GHz at 330 GHz with an output power of -8.6 dBm in a 40-nm CMOS process.