Browsing by Author "Hsu, YR"

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Systematic layout planning: a study on semiconductor wafer fabrication facilities
(2000)
Yang, TH
;
Su, CT
;
Hsu, YR
;
交大名義發表
;
National Chiao Tung University
This paper proposes to use Muther's systematic layout Planning Procedure as the infrastructure to solve a fab layout design problem. A multiple objective decision making;ng tool, analytic hierarchy process, is then proposed to evaluate the design alternatives. The proposed procedure is illustrated to be a viable approach for solving a fab layout design problem through a real-world case study. It features both the simplicity of the design Process and the objectivity of the multiple-criteria evaluation process as opposed to existing solution methodologies.