Browsing by Author "Hsu, Yu-Cheng"

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A Hardware Implementation of Real-Time Epileptic Seizure Detector on FPGA
(2011)
Chen, Tsan-Jieh
;
Jeng, Chi
;
Chang, Shun-Ting
;
Chiueh, Herming
;
Liang, Sheng-Fu
a considerable portion of epilepsy cannot be well treated by today\'s available therapies. Brain stimulation with closed-loop seizure control was recently proposed. In our previous work, high accuracy of seizure controller (92-99% during wake-sleep states) using a microcontroller has been proposed and implemented to verify functionality of seizure detection and suppression on a freely moving rat. In this paper, the soft intellectual property (IP) of epileptic seizure detector in the implantable system on chip (SoC) for epileptic seizure control is proposed to achieve continuous real-time processing and low power consumption. All the essential macros for epileptic seizure detector are implemented and integrated in field programmable gate array (FPGA) to verify functionality and capability. The evaluation results of the prototype supported possible application of a portable and continuous real-time seizure control.
Design of Doherty Power Amplifier for Carrier-Aggregation in LTE-A Small Cell Base Station
(2016-01-01)
Li, Jian-Yu
;
Hsu, Yu-Cheng
;
Wu, Lin-Kun
;
電信工程研究所
;
Institute of Communications Engineering
The demand for higher data rate has led to the utilization of carrier aggregation technique, where the linearity and efficiency requirements of power amplifier become more stringent especially for base station. To improve efficiency around the average output power, the two-way symmetrical Doherty power amplifier with unequal input power splitting ratio is proposed. The experimental results show that the proposed Doherty architecture delivers a 39 dBm average output power with low error vector magnitude and high efficiency. Finally, an example of two LTE-Advanced component carriers (CCs) at Band 41 is used to verify the feasibility of the proposed Doherty concept in intra-band carrier aggregation.
High Reliable Doherty Power Amplifier Module for LTE Small Cell Base Station
(2017-01-01)
Hsu, Yu-Cheng
;
Li, Jian-Yu
;
Wu, Lin-Kun
;
電信工程研究所
;
Institute of Communications Engineering
The small-cell base station requires a high linearity, high reliable and high efficiency power amplifier to enhance signal strength in a coverage region. To meet the demand, the 2.6 GHz two-way symmetrical Doherty power amplifier module which uses modularized components, enhances system stability and integrates with heat sink is proposed. The experimental results show that the proposed module delivers a power-added efficiency of 27%, a gain of 47 dB, and adjacent channel leakage ratio of below -33 dBc at an average power of 40 dBm without non-linearity compensation for the LTE signal. Finally, the model of AM-AM and AM-PM with memory effects are predicted by measurement results and it can be used to improve the linearity of the proposed power amplifier.
One-Pot Tandem Photoredox and Cross-Coupling Catalysis with a Single Palladium Carbodicarbene Complex
(2018-04-16)
Hsu, Yu-Cheng
;
Wang, Vincent C. -C.
;
Au-Yeung, Ka-Chun
;
Tsai, Chung-Yu
;
Chang, Chun-Chi
The combination of conventional transition-metal-catalyzed coupling (2e(-) process) and photoredox catalysis (1e(-) process) has emerged as a powerful approach to catalyze difficult cross-coupling reactions under mild reaction conditions. Reported is a palladium carbodicarbene (CDC) complex that mediates both a Suzuki-Miyaura coupling and photoredox catalysis for C-N bond formation upon visible-light irradiation. These two catalytic pathways can be combined to promote both conventional transition-metal-catalyzed coupling and photoredox catalysis to mediate C-H arylation under ambient conditions with a single catalyst in an efficient one-pot process.
Optimal Floating Gate Potential for Extending Data Retention of Post-Baking Method in Sub-20 nm Triple Level per Cell NAND Flash Memory
(2016-07)
Hsu, Yu-Cheng
;
Lin, Wei
;
Chang, Chun-Yen
;
電機學院
;
電子工程學系及電子研究所
A post-baking method with an optimized data pattern is developed to eliminate the program/erase (PE) cycle-induced damage of sub-20 nm NAND Flash memory and to improve its reliability. The electric field of the tunneling oxide (E-ox)-dependent oxide recovery is discussed in detail. The experimental results reveal that additional traps in the tunneling oxide are induced by the E-ox during the baking process via an electron-phonon interaction and the effectiveness of oxide recovery is reduced by the generation of these additional traps. Hence, the additional traps degrade the read margin and retention ability. Therefore, an optimized data pattern is produced to minimize E-ox and reduce the number of additional traps formed during the post-baking process. When the optimized data pattern is utilized in post-baking, the endurance of the sub-20 nm three-level-per-cell (TLC) NAND Flash memory is quadruple improved under one year retention condition.
Room temperature ultraviolet GaN metal-coated nanorod laser
(2013-11-04)
Hsu, Yu-Cheng
;
Sou, Kuok-Pan
;
Chang, Shih-Pang
;
Hsu, Kung-Shu
;
Shih, M. H.
This study demonstrates a room-temperature ultraviolet GaN/Al nanorod (NR) metal laser with an optimized sidewall. A wet-chemical etching process with potassium hydroxide was used to control the GaN NR sidewall angle and polish the NR surface. The lasing action was observed near a wavelength of 365 nm with a low threshold power density of 5.2 mJ/cm(2). The high-quality factor (Q) surface plasmon lasing modes were characterized with experiments and three-dimensional finite-element method simulations. We also studied the optical modes in GaN metal-coated NR with and without an Al layer and verified the metal layer is necessary for high-Q resonant modes. (c) 2013 AIP Publishing LLC.
The Implementation of a Low-Power Biomedical Signal Processor for Real-Time Epileptic Seizure Detection on Absence Animal Models
(2011-12-01)
Chen, Tsan-Jieh
;
Chiueh, Herming
;
Liang, Sheng-Fu
;
Chang, Shun-Ting
;
Jeng, Chi
Epilepsy is one of the most common neurological disorders, with a worldwide prevalence of approximately 1%. A considerable portion of epilepsy patients cannot be treated sufficiently by today's available therapies. Implantable closed-loop neurostimulation is an innovative and effective method for seizure control. A real-time seizure detector is the kernel of a closed-loop seizure controller. In this paper, a low-power biomedical signal processor based on reduced instruction set computer (RISC) architecture for real-time seizure detection is implemented to achieve low-power consumption and perform continuous and real-time processing. The low-power processor is implemented in a 0.18 mu m complementary-metal-oxide semiconductor technology to verify functionality and capability. The measurement results show the implemented processor can reduce over 90% power consumption compared with our previous prototype, which was implemented on an enhanced 8051 microprocessor. This seizure detector was applied to the continuous EEG signals of four Long-Evans rats with spontaneous absence seizures. It also processed 24 h long-term and uninterrupted EEG sequence. The developed seizure detector can be applied for online seizure monitoring and integrated with an electrical stimulator to perform a closed-loop seizure controller in the future.
The Implementation of a Low-Power Biomedical Signal Processor for Real-Time Epileptic Seizure Detection on Absence Animal Models
(2011-12-01)
Chen, Tsan-Jieh
;
Chiueh, Herming
;
Liang, Sheng-Fu
;
Chang, Shun-Ting
;
Jeng, Chi
Epilepsy is one of the most common neurological disorders, with a worldwide prevalence of approximately 1%. A considerable portion of epilepsy patients cannot be treated sufficiently by today\'s available therapies. Implantable closed-loop neurostimulation is an innovative and effective method for seizure control. A real-time seizure detector is the kernel of a closed-loop seizure controller. In this paper, a low-power biomedical signal processor based on reduced instruction set computer (RISC) architecture for real-time seizure detection is implemented to achieve low-power consumption and perform continuous and real-time processing. The low-power processor is implemented in a 0.18 mu m complementary-metal-oxide semiconductor technology to verify functionality and capability. The measurement results show the implemented processor can reduce over 90% power consumption compared with our previous prototype, which was implemented on an enhanced 8051 microprocessor. This seizure detector was applied to the continuous EEG signals of four Long-Evans rats with spontaneous absence seizures. It also processed 24 h long-term and uninterrupted EEG sequence. The developed seizure detector can be applied for online seizure monitoring and integrated with an electrical stimulator to perform a closed-loop seizure controller in the future.