Browsing by Author "Hu, Chenming Calvin"

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A 60-nm-thick enhancement mode In0.65Ga0.35As/InAs/In0.65Ga0.35As high-electron-mobility transistor fabricated using Au/Pt/Ti non-annealed ohmic technology for low-power logic applications
(2016-02)
Fatah, Faiz Aizad
;
Lin, Yueh-Chin
;
Liu, Ren-Xuan
;
Yang, Kai-Chun
;
Lin, Tai-We
A 60-nm-thick E-mode In0.65Ga0.35As/InAs/In0.65Ga0.35As high-electron-mobility transistor (HEMT) was successfully fabricated and evaluated by using Au/Pt/Ti-based non-annealed ohmic technology for high-speed and low-power logic applications. The device exhibited a minimal SS of 69mV/decade, a lower DIBL of 30mV/V, an ION/IOFF ratio above 1.2 x 10(4) at V-DS = 0.5V and a high f(T) of 378GHz and f(max) of 214GHz at V-DS = 1.0V. These results demonstrate that non-annealed ohmic contacts can be used for fabricating E-mode In0.65Ga0.35As/InAs/In0.65Ga0.35As HEMTs with excellent electrical characteristics. The fabricated HEMTs are likely to find use in future high-speed and low-power logic applications. (C) 2016 The Japan Society of Applied Physics.
Effects of In-Situ Plasma-Enhanced Atomic Layer Deposition Treatment on the Performance of HfO2/In0.53Ga0.47As Metal-Oxide-Semiconductor Field-Effect Transistors
(2016-08)
Quang Ho Luc
;
Cheng, Shou Po
;
Chang, Po Chun
;
Huy Binh Do
;
Chen, Jin Han
In-situ plasma-enhanced atomic layer deposition (PEALD) technique was employed for device passivation to realize a high-performance inversion-mode HfO2/In0.53Ga0.47As metal-oxide-semiconductor field-effect transistor (MOSFET). Excellent quality of gate dielectric is enabled by utilizing the PEALD-aluminum nitride as a pre-gate interfacial layer, followed by a post-gate remote-plasma gas treatment. In-situ PEALD treatment led to enhanced dc characteristics, such as drain current, peak transconductance, subthreshold swing, OFF leakage current, and effective electron mobility. X-ray photoelectron spectroscopy analysis indicates a reduction of In-and Ga-related signals. Furthermore, small drain current hysteresis and low-interface state density (D-it) value confirm a high interfacial quality for the high-k/III-V structure. Overall, the PEALD passivation for HfO2/In0.53Ga0.47As interface shows a remarkable improvement on the MOSFET performance.
Electrical Characteristics of n, p-In0.53Ga0.47As MOSCAPs With In Situ PEALD-AlN Interfacial Passivation Layer
(2014-08-01)
Quang Ho Luc
;
Chang, Edward Yi
;
Hai Dang Trinh
;
Lin, Yueh Chin
;
Hong Quan Nguyen
The effects of plasma enhanced atomic layer deposition (PEALD)-AlN interfacial passivation layer (IPL) on the Al2O3/In0.53Ga0.47As interfaces qualities are studied with different plasma powers. The improvement in electrical properties, including capacitance-voltage (C-V) hysteresis, frequency dispersion, and interface state densities (D-it) are demonstrated on the Al2O3/n, p-In0.53Ga0.47As MOS capacitors. The excellent C-V behaviors are observed on both type of In0.53Ga0.47As-based MOS devices by performing a thin AlN-IPL at the plasma power of 150 W. To explore the interaction between PEALD-AlN layer and In0.53Ga0.47As surface, X-ray photoelectron spectroscopy and high-resolution transmission electron microscopy analyses have also been characterized.
Gate Recessed Quasi-Normally OFF Al2O3/AlGaN/GaN MIS-HEMT With Low Threshold Voltage Hysteresis Using PEALD AlN Interfacial Passivation Layer
(2014-07-01)
Hsieh, Ting-En
;
Chang, Edward Yi
;
Song, Yi-Zuo
;
Lin, Yueh-Chin
;
Wang, Huan-Chung
In this letter, a gate recessed normally OFF AlGaN/GaN MIS-HEMT with low threshold voltage hysteresis using Al2O3/AlN stack gate insulator is presented. The trapping effect of Al2O3/GaN interface was effectively reduced with the insertion of 2-nm AlN thin interfacial passivation layer grown by plasma enhanced atomic layer deposition. The device exhibits a threshold voltage of +1.5 V, with current density of 420 mA/mm, an OFF-state breakdown voltage of 600 V, and high ON/OFF drain current ratio of similar to 10(9).
Gate Recessed Quasi-Normally OFF Al2O3/AlGaN/GaN MIS-HEMT With Low Threshold Voltage Hysteresis Using PEALD AlN Interfacial Passivation Layer
(2014-07-01)
Hsieh, Ting-En
;
Chang, Edward Yi
;
Song, Yi-Zuo
;
Lin, Yueh-Chin
;
Wang, Huan-Chung
In this letter, a gate recessed normally OFF AlGaN/GaN MIS-HEMT with low threshold voltage hysteresis using Al2O3/AlN stack gate insulator is presented. The trapping effect of Al2O3/GaN interface was effectively reduced with the insertion of 2-nm AlN thin interfacial passivation layer grown by plasma enhanced atomic layer deposition. The device exhibits a threshold voltage of +1.5 V, with current density of 420 mA/mm, an OFF-state breakdown voltage of 600 V, and high ON/OFF drain current ratio of similar to 10(9).
Impact of AlN Interfacial Dipole on Effective Work Function of Ni and Band Alignment of Ni/HfO2/In0.53Ga0.47As Gate-Stack
(2015-12-01)
Huy Binh Do
;
Quang Ho Luc
;
Minh Thien Huu Ha
;
Hu, Chenming Calvin
;
Lin, Yueh Chin
AlN has successfully been applied to passivate the oxide/III-V interface; however, it changes both the metal work function (WF) and band alignment of the gate-stack and, thus, affects the power consumption of the devices. We found that the AlN layer induces a dipole delta = 0.18 eV between HfO2 and substrate. The dipole value obtained from capacitance-voltage characteristics performs good agreement with the results of X-ray photoelectron spectroscopic measurements. The effective WF of Ni is found to be 5.55 eV, which is larger than its WF in vacuum. The valance band offset and the conduction band offset of HfO2 with AlN/In0.53Ga0.47As are found to be 2.82 and 2.06 eV, respectively.
Investigation of Multilayer TiNi Alloys as the Gate Metal for nMOS In0.53Ga0.47As
(2016-12)
Do, Huy Binh
;
Luc, Quang Ho
;
Ha, Minh Thien Huu
;
Huynh, Sa Hoang
;
Hu, Chenming Calvin
To achieve low power consumption for CMOS devices, the gate metals must have effective work function (EWF) aligned with the band edges of the channel material and have a small WF variation (WFV). The multilayer TiNi alloys have been successfully applied as the gate metals for HfO2/In0.53Ga0.47As MOS devices in this paper. The EWF of TiNi alloys was found to increase from 4.41 eV for as-deposited sample to 4.62 eV after the alloy was annealed due to the diffusion of Ni atoms into Ti layer. The multilayer TiNi alloy remained amorphous phase with small WFV until annealed at 600 degrees C. The TiNi alloy is thermally more stable as compared with either Ti or Ni metal, because the TiOxNi interfacial layer prevents the diffusion of Ni atoms into HfO2 film and the further reaction of Ti with HfO2. The results can be applied for InGaAs nMOS fabrication.
Plasma Enhanced Atomic Layer Deposition Passivated HfO2/AlN/In0.53Ga0.47As MOSCAPs With Sub-Nanometer Equivalent Oxide Thickness and Low Interface Trap Density
(2015-12-01)
Luc, Quang Ho
;
Do, Huy Binh
;
Ha, Minh Thien Huu
;
Hu, Chenming Calvin
;
Lin, Yueh Chin
The impact of in situ plasma-enhanced atomic layer deposition passivation on the electrical properties of HfO2/In0.53Ga0.47As metal-oxide-semiconductor capacitors (MOSCAPs) has been studied. Excellent interface quality of high-k/III-V is achieved by aluminum nitride (AlN) interfacial passivation layer, including strong inversion behaviors and unpinned Fermi level. The band alignment of HfO2/AlN/In0.53Ga0.47As structure with the valence band offsets of 2.81 +/- 0.1 eV and the conduction band offsets of 1.9 +/- 0.1 eV was obtained. Better interface and optimized high-k dielectric qualities are achieved using post remote-plasma treatment with either N-2/H-2 or NH3 gases. Sub-nanometer equivalent oxide thickness HfO2/AlN/In0.53Ga0.47As MOSCAPs with low interface trap density and low leakage current density have been characterized.