Browsing by Author "Hu, Chia-Lin"

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A reconfigurable MAC architecture implemented with mixed-V(t) standard cell library
(2008)
Wang, Li-Rong
;
Chiu, Yi-Wei
;
Hu, Chia-Lin
;
Tu, Ming-Hsien
;
Jou, Shyh-Jye
In this paper, a 32-bit reconfigurable multiplication-accumulation architecture, which can execute flexibly one 32x32, two 16x16 or four 8x8 two's complement multiply-accumulation, is proposed and demonstrated. It is based on the modified Booth encoding scheme and designed with techniques of reducing sign-extension bits, removing one extra partial product row and adjusting the positions of hot signals but with elegant modifications. It is implemented with a 130nm mixed-V(t) CMOS standard cell library and shows saving of area and power consumption by approximately 16% and 14% respectively as compared to the previous design.