Browsing by Author "Hu, Chia-Lmi"

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Mixed-Vth (MVT) CMOS circuit design for low power cell libraries
(2007)
Lin, Jiun-Yi
;
Wang, Li-Rong
;
Hu, Chia-Lmi
;
Jou, Shyh-Jye
;
電子工程學系及電子研究所
Mixed-Vth (MVT) technique has been proposed to resize the MOS size and then reduce dynamic power in logic gates by applying a low threshold voltage to transistors in some critical paths, while a standard threshold voltage is used in non-critical paths. This paper presents 130nm and 90nm low power cell libraries using MVT technique. The dynamic power consumption of the cells has been reduced around 5% to 30% and with the same timing specifications.