Browsing by Author "Hu, Chia-Wei"

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Electrical and reliability characteristics of polycrystalline silicon thin-film transistors with high-kappa Eu2O3 gate dielectrics
(2012-04-23)
Yen, Li-Chen
;
Hu, Chia-Wei
;
Chiang, Tsung-Yu
;
Chao, Tien-Sheng
;
Pan, Tung-Ming
In this study, we developed a high-performance low-temperature polycrystalline silicon thin-film transistor (LTPS-TFT) incorporating an ultra thin Eu2O3 gate dielectric. High-kappa Eu2O3 LTPS-TFT annealed at 500 degrees C exhibits a low threshold voltage of 0.16 V, a high effective carrier mobility of 44 cm(2)/V-s, a small subthreshold swing of 142 mV/decade, and a high I-on/I-off current ratio of 1.34 x 10(7). These significant improvements are attributed to the high gate-capacitance density due to the adequate quality of Eu2O3 gate dielectric with small interfacial layer of effective oxide thickness of 2.5 nm. Furthermore, the degradation mechanism of positive bias temperature instability was studied for a high-k Eu2O3 LTPS-TFT device. (C) 2012 American Institute of Physics. [http://dx.doi.org/10.1063/1.4705472]
Interference-Aware Mode Selection for New Arriving Devices in D2D Communications
(2018-01-01)
Hu, Chia-Wei
;
Chien, Feng-Tsun
;
Yang, Chao-Tung
;
Chan, Yu-Wei
;
Min, Geyong
In this work, we consider mode selection mechanisms for device-to-device (D2D) communications underlaying a cellular network with multiple existing active D2D pairs. Focusing on the mode selection of the new arrival D2D pair with existing D2D pairs and cellular users, we study the mode selection rules based on the signal-to-interference plus noise ratio (SINR) of the new arrival user and the overall system capacity. For each selection rule, we utilize and discuss pros/cons of two different sets of precoders. In the first set of precoder choice, the block diagonalization (BD) is implemented among cooperating cellular users while zero forcing (ZF) is adopted for the D2D users. In the second set, the maximum signal-to-leakage-and-noise ratio (SLNR) precoder is employed for both cellular users and D2D pairs. The simulation results show that the underlay mode is the best option for the new arrival D2D pair.
Structural and Electrical Properties of High-k HoTiO3 Gate Dielectrics
(2010)
Pan, Tung-Ming
;
Yen, Li-Chen
;
Hu, Chia-Wei
;
Chao, Tien-Sheng
;
電子物理學系
We developed a high-k HoTiO3 gate dielectric deposited on Si (100) through reactive cosputtering. They found that the HoTiO3 dielectrics annealed at 800 degrees C exhibited excellent electrical properties such as high capacitance value, small density of interface state, almost no hysteresis voltage, and low leakage current. This phenomenon is attributed to the decrease in intrinsic defect due to the formation of well-crystallized HoTiO3 structure and composition.