Browsing by Author "Hu, Ming-Jhe"

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Effects of crystallization mechanism on the electrical characteristics of green continuous-wave-laser-crystallized polycrystalline silicon thin film transistors
(2013-07-29)
Chou, Chia-Hsin
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Lee, I-Che
;
Yang, Po-Yu
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Hu, Ming-Jhe
;
Wang, Chao-Lung
Thin film transistors (TFTs) with amorphous silicon films crystallized via continuous-wave green laser at a wavelength of 532 nm exhibit very different electrical characteristics in various crystallization regions, corresponding to the Gaussian energy density distribution of the laser beam. In the center region subjected to the highest energy density, the full melting scheme led to the best crystallinity of the polycrystalline silicon film, resulting in the highest field-effect mobility of 500 cm(2) V-1 s(-1). In contrast, the edge region that resulted in solid phase crystallization exhibited the worst mobility of 48 cm 2 V-1 s(-1) for the polycrystalline silicon TFTs. (C) 2013 AIP Publishing LLC.
The Effects of Nanometal-Induced Crystallization on the Electrical Characteristics of Bottom-Gate Poly-Si Thin-Film Transistors
(2011-07-01)
Lee, I-Che
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Yang, Po-Yu
;
Hu, Ming-Jhe
;
Wang, Jyh-Liang
;
Tsai, Chun-Chien
The effects of active layer thickness and device dimensions on nanometal-induced crystallization (nano-MIC) were studied to determine the electrical characteristics of the polycrystalline silicon (poly-Si) thin-film transistors (TFTs) with bottom-gate structures. The nano-MIC poly-Si film was obtained via deposition of a 0.4-nm-thick Ni film on the amorphous silicon layer and subsequent annealing at 550 degrees C for 0.5 to 8 h. The EDS revealed a similar to 0.1% Ni concentration in the poly-Si film. The cross-sectional TEM image shows the vertical-grain growth mechanism, where the bottom side of the grain exhibits a larger crytalline area than the top side. Therefore, the field effect mobility of the bottom-gate poly-Si TFTs increases with increased active-amorphous-silicon (a-Si) thickness. Furthermore, the mobility increases when the device dimensions are scaled down. A mechanism for explaining such phenomenon in relation to the nano-MIC bottom-gate poly-Si TFTs was also proposed.