Browsing by Author "Huang, Chuen-Uan"
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Item type:Item, A novel array-based test methodology for local process variation monitoring(2009) ;Luo, Tseng-Chin ;Chao, Mango C. -T. ;Wu, Michael S. -Y. ;Li, Kuo-TsaiHsia, Chin C.As process technologies continually advance, local process variation has greatly increased and gradually become one of the most critical factors for IC manufacturing. To monitor local process variation, a large number of DUTs (device-under-test) in close proximity must be measured. In this paper, we presents a novel array-based test structure to characterize local process variation with limited area overhead. The proposed test structure can guarantee high measurement accuracy by utilizing the proposed hardware IR compensation and voltage bias elevation. Furthermore, the DUT layout need not be modified for the proposed test structure so that the measured variation exactly reflects the reality in the manufacturing environment. The measured results from the few most advanced process-technology nodes demonstrate the effectiveness and efficiency of the proposed test structure in quantifying local process variation.Item type:Item, A Novel Array-Based Test Methodology for Local Process Variation Monitoring(2011-05-01) ;Luo, Tseng-Chin ;Chao, Mango C. -T. ;Wu, Michael Shien-Yang ;Li, Kuo-TsaiHsia, Chin C.As process technologies continually advance, local process variation has greatly increased and gradually become one of the most critical factors for integrated circuit manufacturing. To monitor local process variation, a large number of devices-under-test (DUTs) in close proximity must be measured. In this paper, we present a novel array-based test structure to characterize local process variation with limited area overhead. The proposed test structure can guarantee high measurement accuracy by application of the test techniques proposed in this paper: hardware IR compensation, voltage bias elevation, and leakage-current cancelation. Furthermore, the DUT layout need not be modified for the proposed test structure. Thus, the measured variation exactly reflects the reality in the manufacturing environment. The measured results from the few most advanced process-technology nodes demonstrate the effectiveness and efficiency of the proposed test structure in quantifying local process variation.Item type:Item, Folded dual-band (2.4/5.2GHz) antenna fabricated on silicon suspended parylene membrane(2005) ;Chen, I-Yu ;Huang, Chuen-Uan ;Chen, Henry J. H. ;Jou, Christina F.Huang, Star Ruey-ShingA novel and simple kind of dual-band monopole MEMS membrane antenna fabricated on silicon suspended parylene membrane is presented. This parylene membrane is a flexible polymer film and it can be coated on various shapes and surfaces of materials or even peeled off from materials as thin flexible substrate. Because of its low deposition processing temperature, it is possible to be fabricated on CMOS circuits post process with MEMS technology. This folded monopole parylene membrane antenna provides two resonant paths of different lengths to achieve the desired dual-band (2.4/5.2GHz) operation for Bluetooth and WLAN application. The low cost, easy fabrication, easily stickable and peel-off flexible properties of this parylene membrane makes it very attractive and convenient in any wireless portable devices such as mobile phone, RFID tag, Bluetooth and WLAN devices, even any wearable clothes... etc.