Browsing by Author "Huang, Jung-Shou"

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A Computationally Efficient Method for Large Subcarrier Assignment and Bit Allocation Problem of Multiuser OFDM System
(2008-12-01)
Lin, Shin-Yeu
;
Huang, Jung-Shou
;
電控工程研究所
;
Institute of Electrical and Control Engineering
In this paper, we propose a computationally efficient method to solve the large dimension Adaptive Subcarrier Assignment and Bit Allocation (ASABA) problem of multiuser orthogonal frequency division multiplexing system. Our algorithm consists of three Ordinal Optimization (00) stages to find a good enough solution to the considered problem. First of all, we reformulate the considered problem to separate it into subcarrier assignment and bit allocation problem such that the objective function of a feasible subcarrier assignment pattern is the corresponding optimal bit allocation for minimizing the total consumed power. Then in the first stage, we develop an approximate objective function to evaluate the performance of a subcarrier assignment pattern and use a genetic algorithm to search through the huge solution space and select s best subcarrier assignment patterns based on the approximate objective values. In the second stage, we employ an off-line trained artificial neural network to estimate the objective values of the s subcarrier assignment patterns obtained in stage I and select the I best patterns. In the third stage, we use the exact objective function to evaluate the I subcarrier assignment patterns obtained in stage 2, and the best one associated with the corresponding optimal bit allocation is the good enough solution that we seek. We apply our algorithm to numerous cases of large-dimension ASABA problems and compare the results with those obtained by four existing algorithms. The test results show that our algorithm is the best in both aspects of solution quality and computational efficiency.
Adaptive subcarrier assignment and bit allocation for multiuser OFDM system using ordinal optimization approach
(2008-09-01)
Lin, Shin-Yeu
;
Huang, Jung-Shou
;
電控工程研究所
;
Institute of Electrical and Control Engineering
In this paper, we propose an ordinal optimization (OO) theory-based four-stage approach to deal with the subcarrier assignment and bit allocation problem of a multiuser orthogonal frequency-division multiplexing (OFDM) system. The four-stage OO approach ensures the quality of the obtained solution, however, at the cost of solving a continuous version of the considered problem in the first stage. To resolve this computational complexity problem, we propose a hardware-implementable dual projected gradient (DPG) method to exploit deep-submicrometer technology. Compared to some existing methods using numerous simulation cases with randomly generated parameters, our approach is excellent in the aspect of power consumption. In the meantime, the estimated computation time of our approach can meet the real-time application requirement. Furthermore, we use extensive simulations to compare our good-enough solutions with the true optimal solutions, and the results show that the objective value obtained by our approach deviates from the optimal objective value around 1% on average.
Expert system based parallel multi-1D block matching algorithm with implementation for motion estimation
(2012-02-15)
Lin, Shin-Yeu
;
Su, Chong-Wei
;
Huang, Jung-Shou
;
電控工程研究所
;
Institute of Electrical and Control Engineering
In this paper, we propose an expert-system based parallel multi-1-dimensional block matching algorithm (ESPM-1D-BMA) for motion estimation (ME). Instead of the conventional 2D block matching, we employ the parallel multi-1D blocks matching to improve the computing speed. To improve the ME accuracy, we design a knowledge base and inference engine to determine the true motion vector (MV) from the results of parallel multi-1D blocks matching. To speed up the computing speed further, we present a hardware architecture for implementing the ESPM-1D-BMA. We have demonstrated that the MV estimation accuracy achieved by the proposed ESPM-1D-BMA is much better than the comparing fast block matching algorithms and is close to the 2 dimensional full search block matching algorithm (2D-FSBMA). We also demonstrate that the computing speed of the proposed ESPM-1D-BMA is about two times as fast as the mixed-signal 2D-FSBMA (MS-2D-FSBMA). (C) 2011 Elsevier Ltd. All rights reserved.
Expert system based parallel multi-1D block matching algorithm with implementation for motion estimation
(2011-02-15)
Lin, Shin-Yeu
;
Su, Chong-Wei
;
Huang, Jung-Shou
;
電控工程研究所
;
Institute of Electrical and Control Engineering
In this paper, we propose an expert-system based parallel multi-1-dimensional block matching algorithm (ESPM-1D-BMA) for motion estimation (ME). Instead of the conventional 2D block matching, we employ the parallel multi-1D blocks matching to improve the computing speed. To improve the ME accuracy, we design a knowledge base and inference engine to determine the true motion vector (MV) from the results of parallel multi-1D blocks matching. To speed up the computing speed further, we present a hardware architecture for implementing the ESPM-1D-BMA. We have demonstrated that the MV estimation accuracy achieved by the proposed ESPM-1D-BMA is much better than the comparing fast block matching algorithms and is close to the 2 dimensional full search block matching algorithm (2D-FSBMA). We also demonstrate that the computing speed of the proposed ESPM-1D-BMA is about two times as fast as the mixed-signal 2D-FSBMA (MS-2D-FSBMA). (C) 2011 Elsevier Ltd. All rights reserved.
Multi-1D Block Matching Algorithm Based Motion Estimation Processor Using Mixed-Signal Approach
(2010)
Lin, Shin-Yeu
;
Su, Chong-Wei
;
Huang, Jung-Shou
;
電控工程研究所
;
Institute of Electrical and Control Engineering
In this paper, we propose a Mixed Signal Parallel Multi 1Dimensional Block Matching Algorithm (MSPM-1D-BMA) based motion estimation (ME) processor. In contrast to the typical 2Dimensional full search block matching algorithm (2DFSBMA), the MSPM-1D-BMA based ME processor will greatly reduce the number of data movements in between memories. We employ a voting algorithm in the proposed ME processor to improve the accuracy of motion vector (MV) estimation. We have demonstrated that the MV estimation accuracy achieved by the proposed ME processor is much better than the existing fast block matching algorithms and is close to 2DFSBMA. We also demonstrated that the speed of the proposed ME processor approaches two times as that of the mixed signal 2DFSBMA based ME processor.