Browsing by Author "Huang, KC"

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A compiled-code parallel pattern logic simulator with inertial delay model
(1997)
Huang, KC
;
Lee, JE
;
交大名義發表
;
電子工程學系及電子研究所
;
National Chiao Tung University
This gaper presents a parallel pattern compiled code logic simulator which can handle the transport delay as well as the inertial delay of the logic gate. It uses Potential-Change Frame, incorporating with inertial functions, to execute event-canceling operation for gates, thus eliminating the conventional time wheel mechanism. As a result, it can adopt the parallel pattern strategy to increase the simulation speed. Furthermore, it is a compiled code simulator, which further improves its performance. Experimental results show that it surpasses significantly over the conventional time wheel. event-driven simulator in the simulation speed. In addition, it is also found that, significant percentage (27%) of hazards should be eliminated when only the transport delay is considered in the simulation.
A compiled-code parallel pattern logic simulator with inertial delay model
(1999-11-01)
Huang, KC
;
Lee, CL
;
Chen, JE
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
This paper presents a parallel pattern compiled code logic simulator which can handle the transport delay as well as the inertial delay of the logic gate. It uses Potential-Change Frame, incorporating inertial functions, to execute event-canceling operation of gates, thus eliminating the conventional time wheel mechanism. As a result, it can adopt the parallel pattern strategy to increase the simulation speed. Furthermore, it is a compiled code simulator, which further improves its performance. Experimental results show that it significantly surpasses the conventional time wheel event-driven simulator in terms of simulation speed. In addition, it is also found that a significant percentage (27%) of hazards can be eliminated when the effect of the inertial delay is considered in the simulation.
A study of the total chromatic number of equibipartite graphs
(1998-04-06)
Chen, BL
;
Cheng, CK
;
Fu, HL
;
Huang, KC
;
應用數學系
The total chromatic number chi(t)(G) of a graph G is the least number of colors needed to color the vertices and edges of G so that no adjacent vertices or edges receive the same color, no incident edges receive the same color as either of the vertices it is incident with. In this paper, we obtain some results of the total chromatic number of the equibiparrite graphs of order 2n with maximum degree n - 1. As a part of our results, we disprove the biconformability conjecture. (C) 1998 Published by Elsevier Science B.V. All rights reserved.
Case studies on cache performance and optimization of programs with unit strides
(1997-02-01)
Wu, PC
;
Huang, KC
;
交大名義發表
;
資訊工程學系
;
National Chiao Tung University
Cache performance in modern computers is important for program efficiency. A cache is thrashing if a significant amount of time is spent moving data between the memory and the cache. This paper presents two cache thrashing examples, one in scientific computing and one in image processing, both of which involve several one-dimensional arrays that are accessed sequentially, i.e., with unit strides. Accessing arrays in unit strides was considered very efficient on cache-based computer systems. However, the existence of cache thrashing is demonstrated by significant increases in computing speed in the equivalent programs tuned for cache locality. This shows that accessing several arrays sequentially may cause cache thrashing. Thus, to improve cache performance, it is important that the compiler or the programmer takes all arrays inside a loop into consideration. (C) 1997 by John Wiley & Sons, Ltd.
Connectivity of cages
(1997-02-01)
Fu, HL
;
Huang, KC
;
Rodger, CA
;
應用數學系
;
Department of Applied Mathematics
A (k; g)-graph is a k-regular graph with girth g. Let f(k; g) be the smallest integer nu such there exists a (k; g)-graph with nu vertices. A (k; g)-cage is a (k; g)-graph with f(k; g) vertices. In this paper we prove that the cages are monotonic in that f(k; g(1)) < f(k; g(2)) for all k greater than or equal to 3 and 3 less than or equal to g(1) < g(2). We use this to prove that (k; g)-cages are 2-connected,and if k = 3 then their connectivity is k. (C) 1997 John Wiley & Sons, Inc.
Design patterns for parallel computations of master-slave model
(1997)
Huang, KC
;
Wang, FJ
;
資訊工程學系
;
Department of Computer Science
This paper presents two design patterns useful for parallel computations of master-slave model. These patterns are concerned with task management and parallel and distributed data structures. They can be used to help address the issues of data partition and mapping, dynamic task allocation, and load balancing in parallel programming with the benefit of less programming efforts and better program structures. The patterns are described in object-oriented notation, accompanied with illustrative examples in C++. We also provide our experience in applying these. patterns to two scientific simulation programs simulating Ising model and plasma respectively. Since master-slave model is a widely used parallel programming paradigm, the design patterns presented in this paper have large potential application in parallel computations.
Integral distance graphs
(1997-08-01)
Chen, JJ
;
Chang, GJ
;
Huang, KC
;
應用數學系
;
Department of Applied Mathematics
Suppose D is a subset of all positive integers. The distance graph G(Z, D) with distance set D is the graph with vertex set Z, and two vertices x and y are adjacent if and only if \x - y\ is an element of D. This paper studies the chromatic number chi(Z, D) of G(Z, D). In particular, we prove that chi(Z,D) less than or equal to \D\ + 1 when \D\ is finite. Exact values of chi(G, D) are also determined for some D with \D\ = 3. (C) 1997 John Wiley & Sons, Inc.
Integral distance graphs
(1997-08-01)
Chen, JJ
;
Chang, GJ
;
Huang, KC
;
應用數學系
;
Department of Applied Mathematics
Suppose D is a subset of all positive integers. The distance graph G(Z, D) with distance set D is the graph with vertex set Z, and two vertices x and y are adjacent if and only if x - y is an element of D. This paper studies the chromatic number chi(Z, D) of G(Z, D). In particular, we prove that chi(Z,D) less than or equal to D + 1 when D is finite. Exact values of chi(G, D) are also determined for some D with D = 3. (C) 1997 John Wiley & Sons, Inc.
Linear k-arboricities on trees
(2000-07-15)
Chang, GJ
;
Chen, BL
;
Fu, HL
;
Huang, KC
;
應用數學系
For a fixed positive integer k, the linear k-arboricity la(k)(G) of a graph G is the minimum number l such that the edge set E(G) can be partitioned into G disjoint sets and that each induces a subgraph whose components are paths of lengths at most k. This paper studies linear k-arboricity from an algorithmic point of view. In particular, we present a linear-time algorithm to determine whether a tree T has la(k)(T)less than or equal to m. (C) 2000 Elsevier Science B.V. All rights reserved.
Maximization of power dissipation under random excitation for burn-in testing
(1998)
Huang, KC
;
Lee, CL
;
Chen, JE
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
This work proposes an approach to generate weighted random patterns which can maximally excite a circuit during its burn-in testing. The approach is based on a probability model and a maximization procedure to obtain signal transition probability distribution for primary inputs and to generate weighted random patterns according to the obtained probability distribution. It can especially generate weighted random patterns to excite particularly selected "weak nodes" of the circuit in order to expose the early failure of these nodes. Experimental results show that this approach can increase the power dissipation of the total circuit nodes up to 26.68% and the switching activity of particularly selected nodes up to 41.51% respectively.
Parallelizing a level 3 BLAS library for LAN-connected workstations
(1996-10-10)
Huang, KC
;
Wang, FJ
;
Wu, PC
;
交大名義發表
;
資訊工程學系
LAN-connected workstations are a heterogeneous environment, where each workstation provides time-varying computing power, and thus dynamic load balancing mechanisms are necessary for parallel applications to run efficiently. Parallel basic linear algebra subprograms (BLAS) have recently shown promise as a means of taking advantage of parallel computing in solving scientific problems. Most existing parallel algorithms of BLAS are designed for conventional parallel computers; they do not take the particular characteristics of LAN-connected workstations into consideration. This paper presents a parallelizing method of Level 3 BLAS for LAN-connected workstations. The parallelizing method makes dynamic load balancing through column-blocking data distribution. The experiment results indicate that this dynamic load balancing mechanism really leads to a more efficient parallel level 3 BLAS for LAN-connected workstations. (C) 1996 Academic Press, Inc.
Parallelizing a level 3 BLAS library for LAN-connected workstations
(1996-10-10)
Huang, KC
;
Wang, FJ
;
Wu, PC
;
資訊工程學系
;
Department of Computer Science
LAN-connected workstations are a heterogeneous environment, where each workstation provides time-varying computing power, and thus dynamic load balancing mechanisms are necessary for parallel applications to run efficiently. Parallel basic linear algebra subprograms (BLAS) have recently shown promise as a means of taking advantage of parallel computing in solving scientific problems. Most existing parallel algorithms of BLAS are designed for conventional parallel computers; they do not take the particular characteristics of LAN-connected workstations into consideration. This paper presents a parallelizing method of Level 3 BLAS for LAN-connected workstations. The parallelizing method makes dynamic load balancing through column-blocking data distribution. The experiment results indicate that this dynamic load balancing mechanism really leads to a more efficient parallel level 3 BLAS for LAN-connected workstations. (C) 1996 Academic Press, Inc.
Robust image watermarking based on multiple description vector quantisation
(2004-10-28)
Pan, JS
;
Hsin, YC
;
Huang, HC
;
Huang, KC
;
電子工程學系及電子研究所
An innovative scheme for watermarking based on vector quantisation for transmitting over noisy channels is proposed. By modifying multiple description vector quantisation for watermark embedding and extraction, simulation results not only demonstrate effective transmission of the watermarked image, but reveal the robustness of the extracted watermark.
Temperature dependent channel backscattering coefficients in nanoscale MOSFETs
(2002)
Chen, MJ
;
Huang, HT
;
Huang, KC
;
Chen, PN
;
Chang, CS
The ratio of the mean-free-path to the critical length near the low-field source is key to channel backscattering characteristics in nanoFETs. To extract it, we perform temperature experiment from -40 degreesC to 75 degreesC on 17 Angstrom thick gate oxide MOSFETs with varying mask gate lengths down to 75 nm. In this paper we report that once the saturation drain current is measured against temperature, the mean-free-path lambda with respect to the critical length l can readily be assessed at pecific temperature. Dependencies on gate length, drain voltage, and gate voltage are then established that further enable nanoFETs scaling projections. The temperature dependent version of existing backscattering model is derived in this work.
Two design patterns for data-parallel computation based on master-slave model
(1999-05-28)
Huang, KC
;
Wang, FJ
;
Tsai, JH
;
資訊工程學系
;
Department of Computer Science
This paper presents two design patterns useful for parallel computations of master-slave model. These patterns are concerned with task management and parallel and distributed data structures. They can be used to help addressing the issues of data partition and mapping, dynamic task allocation and management in parallel programming with the benefit of less programming efforts and better program structures. The patterns are described in object-oriented notation, accompanied with illustrative examples in C++. We also provide our experience in applying these patterns to two scientific simulation programs simulating Ising model and plasma physics respectively. Since master-slave model is a widely used parallel programming paradigm, the design patterns presented in this paper have large potential application in parallel computations. (C) 1999 Elsevier Science B.V. All rights reserved.