Browsing by Author "Huang, Pei-Yu"

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A Multiple Supply Voltage Based Power Reduction Method in 3-D ICs Considering Process Variations and Thermal Effects
(2009)
Yu, Shih-An
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Huang, Pei-Yu
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Lee, Yu-Min
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電信工程研究所
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Institute of Communications Engineering
In this paper, a grid-based multiple supply voltage (MSV) assignment method is presented to statistically minimize the total power consumption of 3-D IC. This method consists of a statistical electro-thermal simulator to get the mean and variance of on-chip, a thermal-aware statistical static timing analysis (SSTA) to take into account the thermal effect on circuit timing, the statistical power-delay-sensitivity-slack product to be the optimization criterion, and an incremental update of statistical timing to save the runtime. The experimental results demonstrate the effectiveness of the developed methodology and indicate that the consideration of the thermal effect in the circuit simulation is imperative.
An Efficient Method for Analyzing On-Chip Thermal Reliability Considering Process Variations
(2013-07-01)
Lee, Yu-Min
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Huang, Pei-Yu
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電機資訊學士班
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Undergraduate Honors Program of Electrical Engineering and Computer Science
This work provides an efficient statistical electrothermal simulator for analyzing on-chip thermal reliability under process variations. Using the collocation-based statistical modeling technique, first, the statistical interpolation polynomial for on-chip temperature distribution can be obtained by performing deterministic electrothermal simulation very few times and by utilizing polynomial interpolation. After that, the proposed simulator not only provides the mean and standard deviation profiles of on-chip temperature distribution, but also innovates the concept of thermal yield profile to statistically characterize the on-chip temperature distribution more precisely, and builds an efficient technique for estimating this figure of merit. Moreover, a mixed-mesh strategy is presented to further enhance the efficiency of the developed statistical electrothermal simulator. Experimental results demonstrate that (1) the developed statistical electrothermal simulator can obtain accurate approximations with orders of magnitude speedup over the Monte Carlo method; (2) comparing with a well-known cumulative distribution function estimation method, APEX [Li et al. 2004], the developed statistical electrothermal simulator can achieve 215x speedup with better accuracy; (3) the developed mixed-mesh strategy can achieve an order of magnitude faster over our baseline algorithm and still maintain an acceptable accuracy level.
Evidence of preserved collagen in an Early Jurassic sauropodomorph dinosaur revealed by synchrotron FTIR microspectroscopy
(2017-01-31)
Lee, Yao-Chang
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Chiang, Cheng-Cheng
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Huang, Pei-Yu
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Chung, Chao-Yu
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Huang, Timothy D.
Fossilized organic remains are important sources of information because they provide a unique form of biological and evolutionary information, and have the long-term potential for genomic explorations. Here we report evidence of protein preservation in a terrestrial vertebrate found inside the vascular canals of a rib of a 195-million-year-old sauropodomorph dinosaur, where blood vessels and nerves would normally have been present in the living organism. The in situ synchrotron radiation-based Fourier transform infrared (SR-FTIR) spectra exhibit the characteristic infrared absorption bands for amide A and B, amide I, II and III of collagen. Aggregated haematite particles (alpha-Fe2O3) about 6 similar to 8 mu m in diameter are also identified inside the vascular canals using confocal Raman microscopy, where the organic remains were preserved. We propose that these particles likely had a crucial role in the preservation of the proteins, and may be remnants partially contributed from haemoglobin and other iron-rich proteins from the original blood.
Full-Chip Thermal Analysis for the Early Design Stage via Generalized Integral Transforms
(2009-05-01)
Huang, Pei-Yu
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Lee, Yu-Min
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電信工程研究所
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Institute of Communications Engineering
The capability of predicting the temperature profile is critically important for timing estimation, leakage reduction, power estimation, hotspot avoidance and reliability concerns during modern IC design. This paper presents an accurate and fast analytical full-chip thermal simulator for early-stage temperature-aware chip design. By using the generalized integral transforms (GIT), an accurate formulation is derived to estimate the temperature distribution of full-chip with a truncated set of spatial bases which only needs very small truncation points. Then, we develop a fast Fourier transform like evaluating algorithm to efficiently evaluate the derived formulation. Experimental results confirm that the proposed GIT-based analyzer can achieve an order of magnitude speedup compared with a highly efficient Green's function-based thermal simulator. Finally, we propose a 3-D IC thermal simulator and demonstrate its efficiency and accuracy.
Hierarchical power delivery network analysis using Markov chains
(2007)
Huang, Pei-Yu
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Lin, Chih-Kang
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Lee, Yu-Min
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電信工程研究所
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Institute of Communications Engineering
This paper proposes a Markov chain based hierarchical method to efficiently analyze the power delivery network. After the network being partitioned into several subnetworks, each subnetwork is transformed into a local Markov chain. Then, the connective relations between all subnetworks are modeled as a global Markov chain. Finally, those local and the global Markov chains are incorporated to build a hierarchical bipartite Markov chain engine to analyze the power delivery network. The experimental results not only demonstrate the accuracy of proposed method compared with a very accurate time domain solver [1], but also show its significant runtime improvement, over 200 times faster than the InductWise [1] and over 10 times faster than the IEKS method [2], and less memory usage.
I-LUTSim: An Iterative Look-Up Table Based Thermal Simulator for 3-D ICs
(2013-01-01)
Pan, Chi-Wen
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Lee, Yu-Min
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Huang, Pei-Yu
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Yang, Chi-Ping
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Lin, Chang-Tzu
This work presents an iterative look-up table based thermal simulator, I-LUTSim, to efficiently estimate the temperature profile of three-dimensional integrated circuits. I-LUTSim includes two stages. First, the pre-process stage constructs thermal impulse response tables. Then, the simulation stage iteratively calculates the temperature profile via the table lookup. With this two-stage scheme, the maximum absolute error of I-LUTSim is less than 0.41% compared with that of a commercial tool ANSYS. Moreover, I-LUTSim is at least an order of magnitude faster than a fast matrix solver SuperLU [1] for the full-chip temperature simulation.
LUTSim: A Look-Up Table-Based Thermal Simulator for 3-D ICs
(2015-08-01)
Lee, Yu-Min
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Pan, Chi-Wen
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Huang, Pei-Yu
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Yang, Chi-Ping
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電機資訊學士班
To sustain Moore\'s law, three-dimensional integrated circuit (3-D IC) is a promising solution to achieve high performance and low cost targets. However, its operating temperature is higher than that of a 2-D IC because of its high power density of stacked dies and ill of heat dissipation capability. Therefore, on-chip thermal effects have become major concerns of 3-D ICs. Utilizing look-up table approach, this paper, LUTSim, provides two thermal simulation engines, I-LUTSim and S-LUTSim, to efficiently calculate the thermal profile of a 3-D IC. I-LUTSim is suitable for full-chip thermal analysis, and S-LUTSim is suited for incremental-thermal updating. With utilizing the prebuilt tables, compared with a commercial tool ANSYS, the absolute error of I-LUTSim is less than 0.29%. Moreover, with negligible loss of accuracy, I-LUTSim can be 38.8 times faster than a well-known matrix solver SuperLU for performing full-chip thermal simulation. Besides, S-LUTSim can be over 1.05 million times faster than SuperLU for adjusting the thermal profile after inserting/removing a through silicon via.
NUMANA: A Hybrid Numerical and Analytical Thermal Simulator for 3-D ICs
(2013-01-01)
Lee, Yu-Min
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Wu, Tsung-Heng
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Huang, Pei-Yu
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Yang, Chi-Ping
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交大名義發表
By combining analytical and numerical simulation techniques, this work develops a hybrid thermal simulator, NUMANA, which can effectively deal with complicated material structures, to estimate the temperature profile of a 3-D IC. Compared with a commercial tool, ANSYS, its maximum relative error is only 1.84%. Compared with a well known linear system solver, SuperLU [1], it can achieve orders of magnitude speedup.
On-Chip Statistical Hot-Spot Estimation Using Mixed-Mesh Statistical Polynomial Expression Generating and Skew-Normal Based Moment Matching Techniques
(2012)
Huang, Pei-Yu
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Lee, Yu-Min
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Pan, Chi-Wen
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電機工程學系
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Department of Electrical and Computer Engineering
This work introduces the concept of thermal yield profile for the hot-spot identification with considering process variations and provides an efficient estimating technique for the thermal yield profile. After executing a mixed-mesh strategy for generating statistical polynomial expression of the on-chip temperature distribution, the thermal yield profile is obtained by a skew-normal based moment matching technique. Comparing with the Monte Carlo method, experimental results demonstrate that our method can efficiently and accurately estimate the thermal yield profile. With the same level of accuracy, our skew-normal based method achieves 215x speedup over the state of the art, APEX [1], for estimating the thermal yield profile. Moreover, results show that our mixed-mesh statistical polynomial expression generator achieves 130x speedup over the statistical collocation based method [2] and still accurately estimates the thermal yield profile.
Simultaneous area minimization and decaps insertion for power delivery network using adjoint sensitivity analysis with IEKS method
(2006)
Huang, Pei-Yu
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Lee, Yu-Min
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Tsai, Jeng-Liang
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Chen, Charlie Chung-Ping
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電信工程研究所
The soaring clocking frequency and integration density demand robust and stable power delivery to support tens of millions of transistor switching. In this paper, we consider the problem of minimizing I he area of wires and decoupling capacitors (decaps) for a power delivery network, subject to the limit on integral of voltage drops. First, we derive the gradients of constraint function without Tellegen's theorem. This greatly simplifies the discuss of adjoint sensitivity analysis. Then, we apply the IEKS method to speed up the sensitivity analysis over 3 times. Finally, this efficient analyzer is incorporated with the state-of-the-art nonlinear programming package, SNOPT, to perform the optimization. Extensive experimental results show that the proposed method can work efficiently for large power delivery networks.
Stochastic Thermal Simulation Considering Spatial Correlated Within-Die Process Variations
(2009)
Huang, Pei-Yu
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Wu, Jia-Hong
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Lee, Yu-Min
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電信工程研究所
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Institute of Communications Engineering
In this work, we develop a statistical thermal simulator including the effect of spatial correlation under within-die process variations. This method utilizes the Karhunen-Loeve (KL) expansion to model the physical parameters, and apply the Polynomial Chaoses (PCs) and the stochastic Galerkin method to tackle stochastic heat transfer equations. We demonstrate the accuracy and efficiency of our simulator by comparing with the Monte Carlo simulation, and point out that the stochastic thermal analysis is essential to provide a robust estimation of temperature distribution for the thermal-aware design flow.