Browsing by Author "Huang, Po-Chun"

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Characteristics of Gate-All-Around Twin Poly-Si Nanowire Thin-Film Transistors
(2009-02-01)
Sheu, Jeng-Tzong
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Huang, Po-Chun
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Sheu, Tzu-Shiun
;
Chen, Chen-Chia
;
Chen, Lu-An
We have investigated the characteristics of gate-all-around (GAA) twin polycrystalline-silicon nanowire (NW) thin-film transistors (TFTs). The NW channel and surrounding gate imparted the GAA twin NW TFT with superior channel controllability. Moreover, the combination of the high surface-to-volume ratio of the NW and the split channel structure led to highly efficient NH(3) plasma treatment, which reduced the effective grain-boundary trap-state density. The GAA twin NW TFT exhibited greatly improved electrical performance, including a lower threshold voltage, a steeper subthreshold swing (114 mV/dec), a higher on/off current ratio (> 10(8)), and a virtual absence of drain-induced barrier lowering (1.3 mV/V).
Electric-Field Enhancement of a Gate-All-Around Nanowire Thin-Film Transistor Memory
(2010-03-01)
Huang, Po-Chun
;
Chen, Lu-An
;
Sheu, Jeng-Tzong
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材料科學與工程學系
;
材料科學與工程學系奈米科技碩博班
A high-performance gate-all-around (GAA) poly-Si nanowire (NW) SONOS-type memory thin-film transistor (TFT) is presented. The presence of the corners of the GAA structure resulted in the program speed and memory window of this device being superior to those of a planar poly-Si TFT device. When erasing, planar devices exhibit a threshold-voltage shift resulting from gate injection; the GAA device was immune to this behavior. The presence of a nonuniform electric field in the channel region during programming and erasing was confirmed through simulation. The device also exhibited superior endurance and data-retention behavior.
Minimizing variation in the electrical characteristics of gate-all-around thin film transistors through the use of multiple-channel nanowire and NH3 plasma treatment
(2012-03-01)
Huang, Po-Chun
;
Chen, Lu-An
;
Chen, Chen-Chia
;
Sheu, Jeng-Tzong
;
材料科學與工程學系
In this paper we describe the electrical performance of gate-all-around (GAA) thin-film transistors (TFTs) featuring poly-Si multiple-channel nanowires (NWs). To minimize the variations in the electrical characteristics of GAA NW TFTs, we compared the effects of several approach, including the use of a multiple-gate structure, the number of multiple channels, and NH3 plasma treatment. We demonstrated not only the gate configuration but also the presence of multiple channels efficiently reduced the variation in the electrical characteristics. Finally, NH3 plasma treatment of the GAA NW TFTs featuring multiple channels further decreased the electrical variations because it decreased the trap density, which modulated device performance. (C) 2011 Elsevier B.V. All rights reserved.
On the Existence of a Weak Solution of a Half-Cell Model for PEM Fuel Cells
(2010)
Chern, Shuh-Jye
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Huang, Po-Chun
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應用數學系
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Department of Applied Mathematics
A nonlinear boundary value problem (BVP) from the modelling of the transport phenomena in the cathode catalyst layer of a one-dimensional half-cell single-phase model for proton exchange membrane (PEM) fuel cells, derived from the 3D model of Zhou and Liu (2000, 2001), is studied. It is a BVP for a system of three coupled ordinary differential equations of second order. Schauder's fixed point theorem is applied to show the existence of a solution in the Sobolev space H(1).
Performance of Dual-Channel Gate-All-Around Polysilicon Nanowire Thin-film Transistor
(2008)
Huang, Po-Chun
;
Sheu, Tzu-Shiun
;
Chen, Chen-Chia
;
Chen, Lu-An
;
Sheu, Jeng-Tzong