Browsing by Author "Huang, Yin-Hsien"

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A study of electromigration behaviors of Ge2Sb2Te5 chalcogenide nano-strips subjected to pulse bias
(2017-07-12)
Huang, Yin-Hsien
;
Hsieh, Tsung-Eong
;
材料科學與工程學系
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Department of Materials Science and Engineering
Electromigration (EM) behaviors of pristine Ge2Sb2Te5 (GST) and cerium-doped GST (Ce-GST) nano-strips were investigated by the mean-time-to-failure (MTTF) tests under the pulse bias at the conditions of pulse frequency (f) ranging from 1 to 25 MHz and duty cycle ranging from 50% to 80%. Analytical results indicated that, at f greater than 10 MHz, the EM failure of GST nano-strips in pulse bias environment could be depicted by the 'average current model'. With the aid of Black's theory, the activation energies (Ea) of EM process under pulse bias were found to be 0.63 and 0.56 eV for GST and Ce-GST nano-strips, respectively. The Ea values were comparatively smaller than those observed in direct-current MTTF test of GST thin-film samples, implying the enhancement of surface diffusion and skin effect in GST nano-strips. The morphology and composition analyses indicated that the electrostatic and the electron-wind forces might simultaneously involve in the mass transport in GST nano-strips under the test conditions of this study. The composition analysis also revealed that doping could not effectively alleviate the element segregation in GST subjected to electrical bias.
A study of phase transition behaviors of chalcogenide layers using in situ alternative-current impedance spectroscopy
(2012-06-15)
Huang, Yin-Hsien
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Huang, Yu-Jen
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Hsieh, Tsung-Eong
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材料科學與工程學系
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Department of Materials Science and Engineering
Electrical properties of chalcogenide thin films, both pristine Ge2Sb2Te5 (GST) and cerium-doped GST, were investigated by in situ alternative-current (AC) impedance spectroscopy. With the aid of brick-layer model and nano-grain composite model, the roles of grain and grain-boundary on the phase transition of chalcogenides were distinguished and the dominance of grain boundary was observed. Tangent loss behaviors deduced by impedance analysis revealed alien-element doping alters the interfacial polarization and delays the phase-transition rate of GST. Analytical results also illustrated that the in situ AC impedance spectroscopy can be an alternative tool for characterizing the phase-change kinetics of chalcogenides thin films with nano-scale grain sizes. (C) 2012 American Institute of Physics. [http://dx.doi.org/10.1063/1.4729528]
Effective thermal parameters of chalcogenide thin films and simulation of phase-change memory
(2015-01-01)
Huang, Yin-Hsien
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Hsieh, Tsung-Eong
;
材料科學與工程學系
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Department of Materials Science and Engineering
Thermal conductivity of Ge2Sb2Te5 (GST) and Ce-doped GST (Ce-GST) chalcogenide thin films and thermal boundary resistances (TBR) at the interface of chalcogenides and thin films such as ZnS:SiO2 and TiN were measured by the 3-omega (3 omega) method in conjunction with the plywood-structure samples. The measured results were then implanted in the finite-element simulation for analyzing the thermal conduction behaviors of phase-change memory (PCM) devices. The analysis utilizing a three-dimensional fully coupled electric and thermal model indicated that the TBR at the interface of chalcogenide and TiN contact layer is the key physical property affecting the temperature profile and heating efficiency of PCM cells subject to a pulse heating operation. It was found the TBR significantly alters the temperature uniformity and suppresses the programming current. For instance, the presence of TBRGST/TiN of 7.01 x 10(-8) m(2) K/W led to a 30% reduction of programming power of PCM cell while the TBRce-GST/TiN of 8.82 x 10(-8) m(2) K/W led to a 27% power reduction in comparison with the case without considering the TBR property. As to the doping effect, higher resistivity of Ce-GST layer led to the decrease of programming current (up to 39% reduction in I-reset) and the low thermal conductivity feature of Ce-GST provided a better thermal confinement effect in PCM cells. The simulation results illustrated that the TBR property must be taken into consideration in optimizing the PCM device structure and this limitation could be remedied by the doping in chalcogenide programming layer. (C) 2014 Elsevier Masson SAS. All rights reserved.
Electromigration behaviors of Ge2Sb2Te5 chalcogenide thin films under DC bias
(2013-12-15)
Huang, Yin-Hsien
;
Hang, Chi-Hang
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Huang, Yu-Jen
;
Hsieh, Tsung-Eong
;
材料科學與工程學系
Electromigration (EM) behaviors of pristine Ge2Sb2Te5 (GST), nitrogen-doped GST (N-GST) and cerium-doped GST (Ce-GST) thin-film strips under DC bias are presented. The mean-time-to-failure (MTTF) analysis based on the Black equation found that the EM failure times at room temperature are 1.2 x 10(4), 40 and 9.2 x 10(2) years and the activation energies (E-a) of EM process are 1.07, 0.57 and 0.68 eV for GST, N-GST and Ce-GST, respectively. Moreover, the calibration of the current density exponent, n, of Black's equation found n values are close to 2 for all samples, implying the dominance of grain boundary diffusion during the mass transport of EM process. For doped GSTs, the inferior EM failure lifespans and smaller E-a values were ascribed to the grain refinement effect which increases the number of grain boundaries in such samples. It consequently promoted the short-circuit diffusion and accelerated the EM failure in doped GSTs. The Blech-type tests on GSTs found that the threshold product, i.e., the product of current density and sample length ((j.L)(th)), is 200 A/cm for GST, 50 A/cm for N-GST and 66.67 A/cm for Ce-GST. Moreover, the product of diffusivity and effective charge number (i.e., DZ*) for GST, N-GST and Ce-GST was 2.0 x 10(-7), 4.5 x 10(-6) and 3.8 x 10(-6) cm(2)/sec, respectively. Analytical results illustrated that the electrostatic force effect dominates the EM failure in samples with short strip lengths while the electron-wind force effect dominates the EM failure in samples with long strip lengths. Doping might alleviate the mass segregation in GST; however, its effect was moderate. (C) 2013 Elsevier B.V. All rights reserved.
Evaluation of the thermal conductance of flip-chip bonding structure utilizing the measurement based on Fourier's law of heat conduction at steady-state
(2018-06-01)
Wu, Chia-Yu
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Huang, Yin-Hsien
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Wu, Hsin-Han
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Hsieh, Tsung-Eong
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材料科學與工程學系
Fourier's law of heat conduction at steady-state was adopted to establish a measurement method utilizing platinum (Pt) thin-film electrodes as the heater and the temperature sensor. The thermal conductivities (kappa's) of Pyrex glass, an epoxy resin and a commercial underfill for flip-chip devices were measured and a good agreement with previously reported values was obtained. The thermal boundary resistances (R-TBR 's) of Pt/sample interfaces were also extracted for discussing their influence on the thermal conduction of samples. Afterward, the flip-chip samples with 2x2 solder joint array utilizing Si wafers as the die and the substrate, without and with the underfills, were prepared and their thermal conductance were measured. For the sample without underfill, the air presenting in the gap of die and the substrate led to the poor thermal conductance of sample. With the insertion of underfills, the thermal conductance of flip-chip samples improved. The resistance to heat transfer across Si/underfill interfaces was also suppressed and to promote the thermal conductance of samples. The thermal properties of underfill and R-TBR at Si/underfill interface were further implanted in the calculation of thermal conductance of flip-chip samples containing various solder joint arrays. The increasing number of solder joints diminished the influence of thermal conduction of underfill and R-TBR of Si/underfill interface on the thermal conductance of samples. The insertion of underfill with high-kappa value might promote the heat conductance of samples containing low-density solder joint arrays; however, it became insignificant in improving the heat conductance of samples containing high-density solder joint arrays. (C) 2018 Author(s).
Forming-free, bi-directional polarity conductive-bridge memory devices with Ge2Sb2Te5 solid-state electrolyte and Ag active electrode
(2015-01-07)
Huang, Yin-Hsien
;
Chen, Hsuan-An
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Wu, Hsin-Han
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Hsieh, Tsung-Eong
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材料科學與工程學系
Preparation and characteristics of conductive-bridge random access memory devices containing Ge2Sb2Te5 (GST) chalcogenide as the solid-state electrolyte, Ag as the active electrode, and W-Ti as the counter electrode are presented. As revealed by the electrical measurement, only the samples containing crystalline GST exhibited the resistive switching behaviors. With an insertion of ZnS-SiO2 dielectric layer at the Ag/GST interface and a postannealing at 100 degrees C for 1 min, the sample exhibited the best electrical performance with satisfactory cycleability and retention properties. Moreover, the forming-free and bi-directional polarity features were observed in such a sample type. Microstructure and composition analyses found the finely dispersed nano-scale Ag clusters in GST and, when electrical bias is applied, the migrating Ag ions may build up the connections in between neighboring Ag clusters. Moreover, grain boundaries in polycrystalline GST might be the main paths for Ag migration. The thread-like conduction channels in GST hence form, leading to the low resistance state of sample. On the contrary, the depletion of Ag in GST broke the connections in between Ag clusters when the electrical bias is reversed. This led to the rupture of conduction channels and, hence, the high resistance state of sample. The low operational voltage, forming-free, and bi-directional polarity features observed in (AZGW)(T) sample might also originated from the fine dispersion of Ag clusters in GST electrolyte. (C) 2015 AIP Publishing LLC.