Browsing by Author "Huang, Yu-An"

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A novel photoresist-based film-profile engineering scheme for fabricating double-gated, recess-channel IGZO thin-film transistors
(2020-04-01)
Huang, Yu-An
;
Peng, Kang-Pin
;
Meng, Yu-Chiao
;
Su, Chun-Jung
;
Li, Pei-Wen
We reported an experimental fabrication of double-gated (DG) thin-film transistor (TFT) with IGZO recess-channel using a designer photoresist-based thin-film profile engineering approach. In this approach, an organic shadow mask of photoresist (PR) was formed over a p(+)-Si wafer that was encapsulated by an oxide layer, The lithographically-patterned PR layer is an effective mask for shadowing reactive species during the subsequent deposition steps of IGZO and Aluminum, enabling the formation of IGZO recess-channel and discrete Al source/drain pads at room temperature. The top-gate or DG configurations with the Si substrate serving as the bottom-gate were investigated. The fabricated DG TFTs show significant; improvements in both I-ON and I-OFF as compared with single-gated TFTs. The proposed process scheme is readily applicable to the back-end-of-line of a chip. This work demonstrates the feasibility of IGZO recess-channel TFTs in various gated configurations, enabling a building block for emerging functional devices for More-than-Moore applications. (C) 2020 The Japan Society of Applied Physics
A Platform with Exquisite Film Profile Engineering in Oxide-Based Thin-Film Transistors for More-than-Moore Applications
(2019-01-01)
Lin, Horng-Chih
;
Huang, Yu-An
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
Recently we proposed and developed a unique film profile engineering (FPE) scheme for the fabrication of high-performance sub-micron oxide-semiconductor TFTs. In this scheme, profiles of the three pivotal thin films contained in a device, including gate oxide, oxide-semiconductor channel, and source/drain metal films, can be effectively tailored by selecting proper deposition tools with tunable process conditions. The fabricated IGZO, ZnO, and ZnON devices show decent performance in terms of high on/off current ratio (>10(8)) and steep subthreshold swing (<100 mV/dec). Since the low-temperature and the mature processes involved are highly compatible to the modern IC manufacturing, the fabricated devices can be readily integrated into the back-end-of-line (BEOL) of an advanced chip, making the FPE scheme useful and potential for a number of emerging applications in the more-than-Moore era.
Scattering of anti-plane shear waves by arbitrarily distributed circular cylinders in a functionally graded multiferroic fibrous composite
(2018-04-01)
Kuo, Hsin-Yi
;
Huang, Yu-An
;
Sun, Chi-Hsiang
;
土木工程學系
;
Department of Civil Engineering
In this work, a theoretical framework is developed for the multiple scattering of an anti-plane shear wave by a functionally graded multiferroic fibrous composite. The composite consists of arbitrarily distributed circular cylinders and may have different sizes and material constituents. The cylinders are exponentially graded along the radial direction. We exploit the multipole expansions, transition matrix, and Graf's addition/binomial expansion theorems to obtain a complete solution of the multiple scattering problem in the scenario of functionally graded multiferroic composites. These solved magneto-electro-elastic fields are then used to obtain the directivity patterns of the scattered wave, dynamic stress (electric displacement/magnetic flux) concentration factors, and scattering cross sections. Numerical results reveal the profound influence of the functionally graded parameter, the material properties of constituent phases, the number of inclusions, as well as the frequency of a propagating SH wave on the scattered field induced by the functionally graded fibers. It is expected that the formulation and numerical results serve as useful references for the design and manufacture of functionally graded piezoelectric-piezomagnetic fibrous composites under dynamic loadings.
Structual Design of T-gate, Air-spacer Poly-Si TFTs for RF applications
(2019-01-01)
Huang, Yu-An
;
Yeh, Yu-Hsiang
;
Lin, Horng-Chih
;
Li, Pei-Wen
;
電子工程學系及電子研究所
We employed Sentaurus TCAD simulation to explore the impacts of major structural parameters on the electrical characteristics of poly-Si TFTs with T-gate and air spacers. The effects and trade-off between the source/drain (S/D) junctions relative to T-gate are discussed with the aim to find insightful information for the design and fabrication of real devices. Influences of the gate geometry on the parasitic capacitances of the T-gate devices are also simulated.