Browsing by Author "Huang, Yuan-Hao"
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Item type:Item, A Classification-Based Elephant Flow Detection Method using Application Round on SDN Environments(2017-01-01) ;Huang, Yuan-Hao ;Shih, Wen-Yueh ;Huang, Jiun-Long ;資訊工程學系Department of Computer ScienceWe propose in this paper a classification-based elephant flow detection method for SDN environments. The proposed elephant flow detection method consists of two classifiers running on the switch and the controller, respectively. For better performance, the concept of application round is used to build the classifier running on the controller. Experimental results show that our elephant flow detection method is able to obtain high recall and F-measure.Item type:Item, A Scalable MIMO Detection Architecture with Non-Sorted Multiple-Candidate Selection(2009) ;Chiu, Po-Lin ;Huang, Yuan-Hao ;電信工程研究所Institute of Communications EngineeringIn this paper, we propose a QR-based MIMO detection algorithm and its architecture based on a non-sorted multiple-candidate selection process. The proposed multiple-candidate selection process can mitigate the error propagation problem in the general QR-SIC detection, and therefore the detection probability is increased. This algorithm requires only 24% of the computational complexity of the V-BLAST, which is only slightly larger than that of the conventional QR-SIC algorithm. Besides, the proposed algorithm features high flexibility between the complexity and the performance, and it can even reach the performance of ML detection for the high performance system. Furthermore, the flexible selection approach requires no sorting operation like traditional K-best algorithm. Thus, a simple scalable VLSI architecture can be constructed for different MEMO configurations.Item type:Item, A Variable-Length FFT Processor for 4x4 MIMO-OFDM Systems(2010) ;Hung, Chian-Chang ;Chiu, Po-Lin ;Huang, Yuan-Hao ;電信工程研究所Institute of Communications EngineeringIn this paper, we present a 128 similar to 2048-point variable-length FFT processor for 4x4 MIMO-OFDM systems. In general, we must use n FFT processors for the nxn MIMO-OFDM system, and only 1/r operation time is employed for radix-r pipeline butterfly processor. This increases hardware cost and reduces hardware efficiency in VLSI implementation. Therefore, we propose radix-4(2) algorithm to deal with four data sequences simultaneously and a butterfly sharing technique to improve the hardware utilization. The design and implementation results show that the proposed FFT processor can achieve 83.3MHz frequency with 3.19mm(2) core area using a standard 90nm technology.Item type:Item, Interpolation-Based QR Decomposition and Channel Estimation Processor for MIMO-OFDM System(2011-05-01) ;Chiu, Po-Lin ;Huang, Lin-Zheng ;Chai, Li-Wei ;Huang, Yuan-Hao電信工程研究所This paper presents a modified interpolation-based QR decomposition algorithm for the grouped-ordering multiple-input multiple-output (MIMO) orthogonal frequency division multiplexing (OFDM) systems. Based on the original research that integrates the calculations of the frequency-domain channel estimation and the QR decomposition for the MIMO-OFDM system, this study proposes a modified algorithm that possesses a scalable property to save the power consumption for interpolation-based QR decomposition in the variable-rank MIMO scheme. Furthermore, we also develop the general equations and a timing scheduling method for the hardware design of the proposed QR decomposition processor for the higher-dimension MIMO system. Based on the proposed algorithm, a configurable interpolation-based QR decomposition and channel estimation processor was designed and implemented using a 90-nm one-poly nine-metal CMOS technology. The processor supports 2 2, 2 4 and 4 4 QR-based MIMO detection for the 3GPP-LTE MIMO-OFDM system and achieves the throughput of 35.16 MQRD/s at its maximum clock rate 140.65 MHz.Item type:Item, Reduced-Complexity Interpolation-based QR Decomposition using Partial Layer Mapping(2011) ;Chai, Li-Wei ;Chiu, Po-Lin ;Huang, Yuan-Hao ;電信工程研究所Institute of Communications EngineeringThis paper presents a double one-dimension interpolation-based QR decomposition (DOD-IQRD) algorithm and a partial layer-mapping (PLM) scheme for multiple-input multiple-output (MIMO) orthogonal-frequency-division-multiplexing (OFDM) systems. The proposed algorithm integrates the calculations of frequency-domain channel estimation and QR decomposition for MIMO-OFDM systems, and thus requires less computational complexity than traditional scheme. Besides, the proposed partial layer-mapping scheme can further reduce computational complexity with negligible performance degradation. The analysis results show that the double one-dimension interpolation-based QR decomposition algorithm reduces the complexity to 45.2% of the traditional algorithm in the 3GPP-LTE 4x4 MIMO-OFDM system. The proposed QR decomposition algorithm combined with the partial layer-mapping scheme can further save up to 70.5% computational complexity for MIMO-OFDM systems.