Browsing by Author "Hung, Yu-Ju"

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A Method to Determine the Located Region of Lateral Trap Position by Analysis of Three-Level Random Telegraph Signals in n-MOSFETs
(2015-01-01)
Chen, Ching-En
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Chang, Ting-Chang
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You, Bo
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Tsai, Jyun-Yu
;
Lo, Wen-Hung
This paper introduces a method to determine the located region of trap position by the analysis of three-level random telegraph signal (RTS) in partially-depleted silicon-on-insulator n-channel metal-oxide-semiconductor field-effect-transistors. For the cases of two traps, the average time at the 2nd level ((12)) is composed of average emission time of one trap and average capture time of the other. Comparison and analysis of (tau(2)) curves varying with gate voltage in RTS measurements with and without interchanged source/drain can clarify the located regions of the two traps. Moreover, the simplified equations are also considered and used to confirm the trap positions. (C) 2015 The Electrochemical Society. All rights reserved.
Abnormal Dual Channel Formation Induced by Hydrogen Diffusion From SiNx Interlayer Dielectric in Top Gate a-InGaZnO Transistors
(2017-03-01)
Chen, Guan-Fu
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Chang, Ting-Chang
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Chen, Hua-Mao
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Chen, Bo-Wei
;
Chen, Hong-Chih
This letter investigates effects of different channel dimensions in top-gate a-InGaZnO4 thin-film transistors with SiNx interlayer dielectric. In narrow channel devices, hydrogen atoms in the SiNx layer diffuse into the entire active layer, inducing a single channel. However, in wider channel devices, the diffusion distance for hydrogen atoms is insufficient to affect the whole channel, instead inducing a double channel. In addition, under hot carrier stress, narrow and wide channels exhibit different degradation behaviors, with simulations showing a strong electrical field at IGZO near the drain terminal of the main channel, which is unaffected by hydrogen.
Abnormal hump in capacitance-voltage measurements induced by ultraviolet light in a-IGZO thin-film transistors
(2017-01-09)
Tsao, Yu-Ching
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Chang, Ting-Chang
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Chen, Hua-Mao
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Chen, Bo-Wei
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Chiang, Hsiao-Cheng
This work demonstrates the generation of abnormal capacitance for amorphous indium-gallium-zinc oxide (a-InGaZnO4) thin-film transistors after being subjected to negative bias stress under ultraviolet light illumination stress (NBIS). At various operation frequencies, there are two-step tendencies in their capacitance-voltage curves. When gate bias is smaller than threshold voltage, the measured capacitance is dominated by interface defects. Conversely, the measured capacitance is dominated by oxygen vacancies when gate bias is larger than threshold voltage. The impact of these interface defects and oxygen vacancies on capacitance-voltage curves is verified by TCAD simulation software. Published by AIP Publishing.
Analysis of Oxide Trap Characteristics by Random Telegraph Signals in nMOSFETs With HfO2-Based Gate Dielectrics
(2016-04)
Chen, Ching-En
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Chang, Ting-Chang
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You, Bo
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Tsai, Jyun-Yu
;
Lo, Wen-Hung
This letter investigates the oxide trap properties in n-channel metal-oxide-semiconductor field-effect transistors with HfO2 and Hf(1-x)ZrxO(2)/metal gate-stacks by an analysis of random telegraph signals. According to the multiphonon emission theory, the extracted relaxation energies show gate voltage dependence in devices with HfO2-based stacks. This dependence results from the different strengths of vibrations of the nearest neighbor Hf atoms of the oxygen vacancy in the immediate vicinity of the oxide trap. Furthermore, this dependence also induces an abnormal gate voltage dependence in terms of the activation energy required for electron capture. These results are confirmed by comparisons between two HfO2-based devices (HfO2 and Hf(1-x)ZrxO(2)).
Effect of SiO2 Buffer Layer Thickness on Performance and Reliability of Flexible Polycrystalline Silicon TFTs Fabricated on Polyimide
(2016-12-01)
Chen, Bo-Wei
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Chang, Ting-Chang
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Hung, Yu-Ju
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Huang, Shin-Ping
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Chen, Hua-Mao
This letter investigates flexible polycrystalline silicon thin film transistor performance variation due to different buffer layer thicknesses. In flexible electronics, thermal expansion stress during device fabrication is inevitable. A thicker SiO2 buffer demonstrates better endurance to thermal expansion stress from the polyimide substrate during device annealing. However, if the SiO2 buffer thickness is above a critical point, its weak heat dissipation capability causes the optimal ELA crystallization condition to shift. A thermal expansion stress simulation and TEM photos were utilized to verify performance variation. Furthermore, a similar trend was observed in electrical characteristics after negative bias temperature instability.
Effects of Repetitive Mechanical Bending Strain on Various Dimensions of Foldable Low Temperature Polysilicon TFTs Fabricated on Polyimide
(2016-08)
Chen, Bo-Wei
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Chang, Ting-Chang
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Hung, Yu-Ju
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Huang, Shin-Ping
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Liao, Po-Yung
This letter investigates the effect of repeated uniaxial mechanical stress on bias-induced degradation behavior in polycrystalline thin-film transistors (TFTs). After 100 000 iterations of channel-width-direction mechanical compression, serious threshold voltage degradation and an abnormal hump are observed. Simulation indicates that the strongest mechanical stress occurs at both sides of the channel edge, between the polycrystalline silicon and gate insulator. Since these stress points produce oxide traps in the gate insulator, the degradation of threshold voltage shift and parasitic current path can be attributed to electron trapping at these intense mechanical stress points. In addition, the degradation becomes serious with diminishing TFT size.
Identical Off-state Current Raise Induced by Photo-induced Schottky Barrier Lowering in a-InGaZnO4 Thin Film Transistors
(2016)
Chen, Hua-Mao
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Chang, Ting-Chang
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Liao, Po-Yung
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Chiang, Hsiao-Cheng
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Chen, Ching-En
This work studies the mechanism of identical photoinduced leakage current in a-InGaZnO4 thin film transistors during reverse gate voltage sweep. There is the identical off-state current with the reverse sweep under UV light irradiation, and the photocurrent for UV light exposure region near the source electrode is more significant than that near the drain electrode, which is different from photocurrent mechanism of low temperature polysilicon TFTs. This is because the photo-generated electrons increase the carrier concentration in a-InGaZnO4 bulk, causing the reduced depletion width of the active layer. Therefore, the back channel of active layer is out of gate control.
Investigating degradation behaviors induced by mobile Cu ions under high temperature negative bias stress in a-InGaZnO thin film transistors
(2017-09-25)
Chiang, Hsiao-Cheng
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Chang, Ting-Chang
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Liao, Po-Yung
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Chen, Bo-Wei
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Tsao, Yu-Ching
This letter investigates the effect of negative bias temperature stress (NBTS) on amorphous InGaZnO4 thin film transistors with copper electrodes. After 2000 s of NBTS, an abnormal subthreshold swing and on-current (I-on) degradation is observed. The recovery of the Id-Vg curve after either annealing or positive bias temperature stress suggests that there are some native mobile copper ions in the active layer. Both the existence of copper and the degradation mechanism can be confirmed by AC stress with different frequencies and by transmission electron microscope energy-dispersive X-ray spectroscopy analysis. Published by AIP Publishing.
Investigation of Abnormal Off-Current in p-Channel Double Diffused Drain Metal-Oxide-Semiconductor Transistors after Hot Carrier Stress
(2016)
Chen, Ching-En
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Chang, Ting-Chang
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Lu, Ying-Hsin
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Chen, Hua-Mao
;
Chen, Bo-Wei
This paper studies the degradation behaviors in IV characteristics and the corresponding improvement for p-channel double diffused drain metal-oxide-semiconductor (DDDMOS) transistors after hot carrier stress (HCS). There is an apparent current which is flowed from source to drain in the off-region after HCS. According to the IV characteristic comparisons between different device structures and ISE-TCAD simulation results, the location and mechanism of this abnormal off-current can be demonstrated. Furthermore, this off-current is suppressed effectively by the different process flows in STI fabrication for this DDDMOS device.
Liquid-Crystal Active Tamm-Plasmon Devices
(2018-06-20)
Cheng, Hao-Chi
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Kuo, Ching-Yung
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Hung, Yu-Ju
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Chen, Kuo-Ping
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Jeng, Shie-Chang
We demonstrate a liquid-crystal (LC)-tuned Tamm-plasmon (TP) resonance device. The term TP polariton refers to plasmonic resonance at the interface between a photonic crystal (PC) and a metallic film. We formulate a precise optical analysis of the proposed device using the transfer-matrix method. A single resonance dip in the photonic band-gap region guarantees that the thickness of the LC layer between the PC and the metallic film can be as small as about 180 nm. Tuning phase retardation in the LC layer is shown to shift the resonance wavelength tens of nanometers, depending on the birefringence and width of the LC layer. Simulation results are in good agreement with the experimental data.
On the Origin of Anomalous OffCurrent Under Hot Carrier Stress in p-Channel DDDMOS Transistors With STI Structure
(2014-06-01)
Chen, Ching-En
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Chang, Ting-Chang
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Chen, Hua-Mao
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You, Bo
;
Yang, Kai-Hsiang
This letter investigates the abnormal OFF-current behavior induced by hot carrier stress (HCS) in p-channel double diffused drain metal-oxide-semiconductor transistors with a shallow trench isolation (STI) structure. According to ISE-TCAD simulation, the electric field at the drain-side corners of the high-voltage n-well (HVNW) adjacent to the STI trench is stronger than the electric field in the channel center in width direction. Moreover, because a nitride layer acts as a buffer in STI, the electrons generated by impact ionization at the corners of the HVNW can be easily trapped in the nitride layer or at the liner oxide/nitride layer interface. Furthermore, the extension of electron trapping in STI from drain to source during HCS forms the OFF-current conductive path. Based on the charge pumping measurements at different operation conditions, this path formation is further demonstrated by the comparisons of charge pumping measurements between initial state and after HCS.
Role of H2O Molecules in Passivation Layer of a-InGaZnO Thin Film Transistors
(2017-04-01)
Chien, Yu-Chieh
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Chang, Ting-Chang
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Chiang, Hsiao-Cheng
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Chen, Hua-Mao
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Tsao, Yu-Ching
This letter analyzes performance and reliability of inverted staggered type amorphous indium-gallium-zinc oxide devices in a moist environment with H2O molecules in the passivation layer. There is a negative threshold voltage shift (Delta Vth) in the saturation region (V-D = 10 V), which increases with decreasing channel length. We propose that this is explained by the drain-induced barrier lowering that is due to the H2O molecules. Moreover, a hydrogen bonding model under bias stress is also proposed, in contrast to the conventional H2O doping model. Recovery behavior after bias stress and ac operation were utilized to distinguish the difference between these models.
Surface Engineering of Polycrystalline Silicon for Long-Term Mechanical Stress Endurance Enhancement in Flexible Low Temperature Poly-Si Thin-Film Transistors
(2017-04-05)
Chen, Bo-Wei
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Chang, Ting-Chang
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Chang, Kuan-Chang
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Hung, Yu-Ju
;
Huang, Shin-Pin
The surface morphology in polycrystalline silicon (poly-Si) film is an issue regardless of whether conventional excimer laser annealing (ELA) or the newer metal-induced lateral crystallization (MILC) process is used. This paper investigates the stress distribution while undergoing longterm mechanical stress and the influence of stress on electrical characteristics. Our simulated results show that the nonuniform stress in the gate insulator is more pronounced near the polysilicon/gate insulator edge and at the two sides of the polysilicon protrusion. This stress results in defects in the gate insulator and leads to a nonuniform degradation phenomenon, which affects both the performance and the reliability in thin-film transistors (TFTs). The degree of degradation is similar regardless of bending axis (channel-length axis, channel-width axis) or bending type (compression, tension), which means that the degradation is dominated by the protrusion effects. Furthermore, by utilizing long-term electrical bias stresses after undergoing long-tern bending stress, it is apparent that the carrier injection is severe in the subchannel region, which confirms that the influence of protrusions is crucial. To eliminate the influence of surface morphology in poly-Si, three kinds of laser energy density were used during crystallization to control the protrusion height. The device with the lowest protrusions demonstrates the smallest degradation after undergoing long-term bending.