Browsing by Author "Jian, Guo-An"

Now showing 1 - 6 of 6

3D DEPTH MAP GENERATION FOR EMBEDDED STEREO APPLICATIONS
(2012)
Lee, Jui-Sheng
;
Jian, Guo-An
;
Chien, Cheng-An
;
Chen, Peng-Sheng
;
Guo, Jiun-In
This paper presents a low complexity 3D image depth map generation algorithm for embedded stereo applications. The proposed algorithm generates depth information based on a single view 2D image automatically. Owing to different scene characteristics of image, we propose a mechanism to classify images to "Scenery", "Normal" and "Close-up" types first and generate the associated depth map according to the proposed techniques. In addition, we propose a human detection method for strengthening the depth information in images with humans and post-processing for refining depth map. With good quality in the generated depth map, the proposed algorithm achieves about 93% in complexity reduction as compared to the traditional algorithm, which is suitable for realization in both the hardware and embedded systems for portable stereo applications.
A Low Complexity Multi-view Video Encoder Exploiting B-frame Characteristics
(2013)
Miao, Yuan-Hsiang
;
Jian, Guo-An
;
Wang, Li-Ching
;
Lee, Jui-Sheng
;
Guo, Jiun-In
This paper proposes a low complexity multi-view video encoder which includes mode decision and early termination based on B-frame characteristics. According to the statistics of coding mode distribution in different B-frame types, we classify all the coding modes into several classes and propose an early terminated mode decision algorithm that can largely reduce the computing complexity. On the other hand, MVD-based adaptive search range scheme is also included in the proposed encoding strategy. In our experimental results, the encoding time is saved up to 91%-93% but the quality loss is controlled within 0.1 dB PSNR drop.
A REAL-TIME PARALLEL SCALABLE VIDEO ENCODER FOR MULTIMEDIA STREAMING SYSTEMS
(2013)
Jian, Guo-An
;
Lee, Jui-Sheng
;
Tan, Kheng-Joo
;
Chen, Peng-Sheng
;
Guo, Jiun-In
Scalable video coding (SVC) is a video coding technique that mainly aims its target in resolving problems of multimedia communication between servers and various clients with different computational power, transmission bandwidths, and display resolutions. In this paper, we developed a parallel SVC encoding system to achieve the real-time coding performance of SVC. First, a GOP-level bit-stream structure that is fully compatible with the standard SVC decoder was proposed to eliminate the data dependencies of encoding among GOPs. Based on this bit-stream structure, we developed a parallel SVC encoding algorithm to exploit the parallelism on multicore systems. Finally, the proposed parallel SVC encoder was implemented and integrated into a multimedia streaming system for the evaluation. The experimental results showed that for CIF/QCIF and VGA/QVGA 2-layer SVC encoding, the proposed parallel SVC encoder can achieve 50.96 and 103.99 times speedup with negligible PSNR drop, respectively.
A Verification-Aware Design Methodology for Thread Pipelining Parallelization
(2012-10-01)
Jian, Guo-An
;
Chien, Cheng-An
;
Chen, Peng-Sheng
;
Guo, Jiun-In
;
電子工程學系及電子研究所
This paper proposes a verification-aware design methodology that provides developers with a systematic and reliable approach to performing thread-pipelining parallelization on sequential programs. In contrast to traditional design flow, a behavior-model program is constructed before parallelizing as a bridge to help developers gradually leverage the technique of thread-pipelining parallelization. The proposed methodology integrates verification mechanisms into the design flow. To demonstrate the practicality of the proposed methodology, we applied it to the parallelization of a 3D depth map generator with thread pipelining. The parallel 3D depth map generator was further integrated into a 3D video playing system for evaluation of the verification overheads of the proposed methodology and the system performance. The results show the parallel system can achieve 33.72 fps in D1 resolution and 12.22 fps in HD720 resolution through a five-stage pipeline. When verifying the parallel program, the proposed verification approach keeps the performance degradation within 23% and 21.1% in D1 and HD720 resolutions, respectively.
High Efficiency Data Access System Architecture for Deblocking Filter Supporting Multiple Video Coding Standards
(2012-05-01)
Chien, Cheng-An
;
Jian, Guo-An
;
Chang, Hsiu-Cheng
;
Chen, Kuan-Hung
;
Guo, Jiun-In
"This paper presents an efficient VLSI architecture of in-loop deblocking filter (ILF) with high efficiency data access system for supporting multiple video coding standards including H. 264 BP/MP/HP, SVC, MVC, AVS, and VC-1. Advanced standards, such as H. 264 MP/HP, SVC, and MVC, adopt Macro Block Adaptive Frame Field (MBAFF) to enhance coding efficiency which results in the performance bottleneck of deblocking filter due to complex data access requirement. This design challenge has not been discussed in previous works according to our best knowledge. Therefore, we develop a Prediction Data Management (PDM) to manage the input prediction data order of deblocking filter for different coding types (like frame/field) and multiple standards. We also design an extended output frame buffer module to solve the system bus architecture restriction (like 1K boundary and burst length) and achieve high efficiency data access by using MB-based scan order. By using these techniques, we can solve the data accessing design challenge and reduce 67% bus latency. After being implemented by using 90 nm CMOS technology, the proposed work can achieve real-time performance requirement of QFHD (3840x2160@30fps) when operated at 156MHz at the cost of 50.6K gates and 2.4K bytes local memory. The maximum operating frequency of the proposed design, i.e. 370MHz, is higher than the required real-time operating frequency so that voltage scaling may be adopted to reduce power consumption."
Real-Time 3D Depth Generation for Stereoscopic Video Applications with Thread-Level Superscalar-Pipeline Parallelization
(2013-07-01)
Jian, Guo-An
;
Chien, Cheng-An
;
Chen, Peng-Sheng
;
Guo, Jiun-In
;
電子工程學系及電子研究所
We propose a low-complexity algorithm for stereoscopic video applications that generates a high-quality 3D image depth map from a single 2D image. Based on their characteristics, 2D images are classified into one of three categories before being processed by the proposed low-complexity algorithm to generate corresponding depth maps. We also extend the 3D depth algorithm to construct a parallel 3D video system. A thread-level superscalar-pipelining approach is developed to parallelize the 3D video system. Experimental results for HD1080 resolution images demonstrate that the algorithm can generate high-quality depth maps with an average reduction in the computational complexity of 98.2 % compared with a conventional algorithm. The parallel 3D video system can achieve a processing speed of 63.66 fps for HD720 resolution video.