Browsing by Author "Juang, Ying-Zong"

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A 2.4-5.4-GHz Wide Tuning-Range CMOS Reconfigurable Low-Noise Amplifier
(2008-12-01)
Fu, Chang-Tsung
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Ko, Chun-Lin
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Kuo, Chien-Nan
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Juang, Ying-Zong
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電子工程學系及電子研究所
A 2.4-5.4-GHz CMOS reconfigurable low-noise amplifier (LNA) is designed. It consists of two stages: a broadband input stage for a steady input matching and noise performance, and a reconfigurable band-selective stage which provides a wide-range frequency tuning from 2.4 to 5.4 GHz and a 12-dB stepped gain with linearity adjustment. The frequency tuning is conducted by a multitapped switching inductor and varactors. Careful design of the switching inductor achieves consistent performance among frequency configurations. The stepped gain and linearity adjustment are provided by a size-switchable transistor with a variable biasing. Fabricated in 0.13 mu m CMOS technology this LNA exhibits performance including up to 25 dB power gain, 2.2-3.1 dB noise figure and less than 5 mW power consumption under 1 V power supply.
A 3.125 Gbps CMOS fully integrated optical receiver with adaptive analog equalizer
(2007)
Chen, Wei-Zen
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Huang, Shih-Hao
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Wu, Guo-Wei
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Liu, Chuan-Chang
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Huang, Yang-Tung
This paper presents the design of a 3.125 Gbps monolithic CMOS optical receiver, integrating a photo detector, a transimpedance amplifier, and a post limiting amplifier on a single chip. The optical receiver is capable of delivering 420 mV(PP) to 50 Omega output load after optical to electrical conversion. High speed operation is achieved by utilizing spatial modulated light (SML) detector and adaptive analog equalizer. Implemented in a 0.18 mu m CMOS technology, the total power dissipation is 175 mW. The chip size is 0.7 mm(2).
A NEW GAS BIO-SENSOR IN THE STRUCTURE OF A MICRO-MACHINED CLAMPED-CLAMPED INERTIAL BEAM AND ITS READOUT CIRCUIT
(2012)
Xue, Bing-Ze
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Chao, Paul C-P
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Lin, Bor-Shyh
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Tsai, Chun-Yin
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Chen, Tsung-Lin
This study presents a novel gas bio-sensor in the form of a micro-machined resonator and its readout circuit. The resonator has the structure of a clamped-clamped beam with thermal actuation and piezo-resistive sensing that supports a plate capable of being attached with test gas molecules to detect gas concentration. The purpose of this study is to design and fabricate the micro-scaled inertial beam with its readout circuit in a system-on-chip package. The circuit includes a driver, a front-end converter, a feed-trough reduction unit, a square-wave converter and a phase detector. In the process of signal reading,, the sensor is first driven by a DDS module and power amplifier, and then sense the vibrations by piezo-resistivity. The piezo-resistivity is detected by a Wheatstone bridge circuits. The carried signal of modulation is processed by a Wheatstone bridge circuits. An instrumentation amplifier adjusts the gain to the appropriate amplitude. The circuit with reduction on feed-through noise increases the SNR. Square wave conversion circuit and PFD process the signal and the driver reference signal to detect phase difference. The data of phase difference is counted into a microcontroller dsPIC4011 and then the data being transmitted to the computer by RS232 to a USB adapter. Finally, the whole circuit is implemented by using TSMC 0.35 2P4M process and one-step post-processing.
A Novel Gas Sensor in the Form of Micro-machined Resonator and its Readout Circuit
(2011)
Xue, Bing-Ze
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Chao, Paul C. -P.
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Lin, Bor-Shyh
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Tsai, Chun-Yin
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Chen, Tsung-Lin
This study presents a novel gas sensor in the form of a micro-machined resonator and its readout circuit. The resonator has the structure of clamped-clamped beams with thermal actuation and piezo-resistive sensing that supports a plate capable of being attached with test gas molecules to detect gas concentration. The purpose of this study was to design a new gas sensor readout system for a clamped-clamped beam resonator with thermal actuation and piezo-resistive sensing and also presents a new approach to reject the feed-through noise. The sensor is driven by a DDS module and power amplifier, and then sense the vibrations by piezo-resistivity. The piezo-resistivity is detected by a Wheatstone bridge circuits. The carried signal of modulation is set in Wheatstone bridge circuits. An instrumentation amplifier adjusts the gain to the appropriate amplitude. The circuit with reduction on feed-through noise increases the SNR. Square wave conversion circuit and PFD process the signal and the driver reference signal to detect phase difference. The data of phase difference is counted into a microcontroller dsPIC4011 and then the data being transmitted to the computer by RS232 to a USB adapter. Finally, the whole circuit is implemented by using TSMC 0.35 mu m 2P4M process and one-step post-processing.
A Small Area Fully Integrated Spread-Spectrum Clock Generator with High EMI-reduction for SATA-3.0 applications
(2010)
Li, Zhen-Yu
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Chiueh, Herming
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Juang, Ying-Zong
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Chiu, Chin-Fong
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傳播研究所
In this paper, a small area spread-spectrum clock generator (SSCG) with high EMI reduction for SATA-3.0 is presented. Conventional methods use inductor-capacitance (LC) tank to fulfill the high frequency requirement for SATA-3.0. However, the monolithic inductors always occupy a large area, and required precisely characteristic for different fabrication processes. This research propose a SSCG using a ring voltage-controlled oscillators (Ring-VCO) at 6GHz operating frequency; By using the proposed Ring-VCO, the active area of SSCG is 65% of comparable LC tank implementations, and Ring-VCO is much easier to characterized for any CMOS process. In addition, a multi-stage-noise-shaping (MASH) delta-sigma modulator (Delta Sigma modulator) is used to reduce fractional spurs and quantization error for high EMI reduction. The chip is designed in TSMC 0.18um 1P6M CMOS process with active area of 500umx300um, and the simulation results consumes 60.43mW with 1.8V supply. The peak-to-peak jitter at 6GHz output of non spread-spectrum is 6.16ps, and the EMI reduction is 22.49dB with 5000ppm down spread to 5.97GHz.
Design and fabrication of a CMOS MEMS logic gate
(2011)
Tsai, Chun-Yin
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Chen, Tsung-Lin
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Liao, Hsin-Hao
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Lin, Chen-Fu
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Juang, Ying-Zong
This study aims to develop a novel CMOS-MEMS logic gate via commercially available CMOS process (TSMC, 2P4M (R)). Compared to existing CMOS MEMS designs, which uses foundry processes, the proposed design imposes several new challenges including: carrying two voltage levels on a non-warping suspended plate, metal-to-metal contact, and etc. Different combinations of oxide-metal films and post-CMOS process are investigated to achieve a non-warping suspended structure layer. And different wet etchants are investigated to remove sacrificial layers without attacking structure layers and features. In a prototype design, the selected structure layer is metal-3 and oxide film; the device is released using AD-10 and titanium etchant; the device is 250 mu m long, 100 mu m wide, and 1.5 mu m gap. The experimental results show that the suspended plate slightly curls down 0.485 mu m. This device can be actuated by 10/0 V with a moving distance 50nm. The resonant frequency is measured at 36 kHz. Due to the damage of the tungsten plugs, the logic function can only be verified by its mechanical movements instead of electrical readouts for now.
Develop a novel thermal switch through CMOS MEMS fabrication process
(2011-01-01)
Lai, You-Liang
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Chou, Lei-Chun
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Juang, Ying-Zong
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Tsai, Hann-Huei
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Huang, Sheng-Chieh
This paper focuses on implementing two novel CMOS-MEMS type switches: buckling type and thermal type, by using commercially available TSMC 0.35 mu m two-poly four-metal (2P4M) CMOS process. There are two novel designs in these two type switches: first, the soft contact structure with post-processing fabrication; second, using residual stress to achieve large structural deformation in buckling type and thermal type switches. To create the soft contact structure, residual gradient stress effect has been utilized to make bending-down curvatures. According to the experiments, the layer Metal1 has the largest negative residual gradient stress [1] effect that can achieve the largest negative deflection in z-axis. Because the structure will bend down after post-processing release, larger lateral contact area are set up to gain the lower contact miss ability. In the post-processing fabrication, 0.3 mu m thickness gold will be deposited on the contact tips. Due to the essence of gold, comparing with aluminum, has no oxidation issue, gold also has the advantage of higher conductivity to reduce the electrical power loss. In the buckling type design, the switch uses residual stress to achieve lateral buckling effect to solve long distance problem. In the thermal type design, this paper design a folded-flexure [2, 3] with the electro-thermal excitation to turn the switch on or off. In the prototype, the device size is 500 mu m x 400 mu m and the gap between two contact pads is 9 mu m in off-state. on the experimental results, the switch can work stably at 3 volts, and the displacement of the thermal type switch can achieve 2.7 mu m, which is sufficient for the mechanism of switching-on or switching-off.
Dynamic-Charging Current-Scaling Technique with Dual Accurate Current Control and Temperature Loops with Charging-Current Accuracy up to 99.6% for 1.6x Faster Lithium-Ion Battery Charging
(2019-01-01)
Lin, Wei-Tin
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Lin, Zong-Yi
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Liu, Chia-Hao
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Huang, Chia-Ming
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Chu, Li-Cheng
Experimental Verification of RF Stress Effect on Cascode Class-E PA Performance and Reliability
(2012-06-01)
Yuan, Jiann-Shiun
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Yen, Hsuan-Der
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Chen, Shuyu
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Wang, Ruey-Lue
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Huang, Guo-Wei
A cascode class-E power amplifier (PA) operating at 5.2 GHz has been designed using Advanced Design System simulation. RF circuit performances such as output power and power-added efficiency before and after RF stress have been experimentally investigated. The measured output power, power-added efficiency, and linearity after high-input-power RF stress at elevated supply voltage show significant circuit degradations. The impact of hot-carrier injection and gate oxide soft breakdown on cascode class-E PA reliability is discussed.
Live Demonstration: The Prototype of Real-Time Image Pre-Processing System for Satellites' Remote Sensing
(2011)
Chen, Tsan-Jieh
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Weng, Chih-Hui
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Chiueh, Herming
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Hsieh, Chih-Cheng
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Yeh, Shang-Fu
the live demonstration shows the prototype of image recombination and processing system for one-dimensional multi-strip CMOS image sensors (CISs.) The proposed final system is discussed in the main paper, which takes advantage of the satellites' linear moving property to control the exposure time of CIS and provides the real-time ability to generate 11,200 x N high-resolution image for satellites' remote sensing applications. The prototype, which contains four strip CISs, is implemented to verify functionality and capability of real-time image acquisition and combination. The implementation result shows the proposed system, which demands four times larger throughput than the prototype, is feasible in a chip.
On-chip transmission line Modeling and applications to millimeter-wave circuit design in 0.13um CMOS technology
(2007)
Ko, Chun-Lin
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Kuo, Chien-Nan
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Juang, Ying-Zong
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交大名義發表
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National Chiao Tung University
This paper presents the on-chip transmission line modeling and applications to circuit design at millimeterwave (mm-wave) frequencies. The microstrip model of circuit simulators benefits in fast calculations of the characteristics of microstrip lines. As the structure of on-chip microstrip differs from the modeled structure, two key parameters of the microstrip model need to be modified for the different electromagnetic (EM) behavior according to the measured microstrip line. With proper parameters, the traditional transmission line model is able to accurately predict the real characteristic of on-chip microstrip lines without timeconsuming EM simulation. A mm-wave microstrip line filter and a single-stage cascode low noise amplifier (LNA) are fabricated to verify the model. All passive components for input/output matching networks and bias networks are onchip. The LNA takes the supply voltage and dc current of 1.4 V and 10 mA, respectively. A gain of 3.8dB and an input/output return loss of 8.5/7.OdB are measured at 60.3GHz. The simulation results in both circuits are in good agreement with measured data.
The Prototype of Real-Time Image Pre-Processing System for Satellites' Remote Sensing
(2011)
Chen, Tsan-Jieh
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Weng, Chih-Hui
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Chiueh, Herming
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Hsieh, Chih-Cheng
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Yeh, Shang-Fu
high resolution image combination and processing plays an important role in today's satellites' remote sensing applications. This paper presents an image recombination and processing system for one-dimensional multi-strip CMOS image sensors (CISs.) The proposed system takes advantage of the satellites' linear moving property to control the exposure time of CIS and provides the real-time ability to generate 11,200 x N high-resolution image for satellites' remote sensing applications. The details of hardware design to meet real-time requirement are given out. The prototype, which contains four strip CISs, is implemented to verify functionality and capability of real-time image acquisition and combination. The implementation results show the proposed system, which demands four times larger throughput than the prototype, is feasible in a chip.
Thermal switch design by using complementary metal-oxide semiconductor MEMS fabrication process
(2011-07-01)
Chiou, Jin-Chern
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Chou, Lei-Chun
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Lai, You-Liang
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Juang, Ying-Zong
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Huang, Sheng-Chieh
The present study focuses on implementing a complementary metal-oxide semiconductor (CMOS) microelectromechanical system thermal switch by using the commercially available Taiwan Semiconductor Manufacturing Company (TSMC) 0.35 mu m two-poly four-metal CMOS process. There are two novel designs: first, the soft contact structure and post-processing fabrication; second, a new design of thermal actuator. To create the soft contact structure, residual stress effect has been utilised to make different bending curvatures. According to the experiments, the layer metal-1 has the largest residual stress effect that can achieve the largest deflection in the z-axis. Because the residual stress of the layer metal-1 is negative, the structure will bend down after release, hence providing larger contact area, which has been set up to obtain the lowest contact miss ability. In the post-processing fabrication, 0.3 mu m thickness gold will be patterned at the contact tips. Since gold, rather than aluminium, has no oxidation issue, it has more reliability in preventing the problem of oxidation than aluminium. In the new thermal actuator design, the authors designed a novel folded-flexure with the electrothermal excitation to turn the switch on or off. In the prototype, the device size is 500 x 400 mu m and the gap between two contact pads is 9 mu m in off-state. Depending on the simulation results, the switch can work stably at 3 V, and the working temperature and operating bandwidth are individually 20-200 degrees C.