Browsing by Author "Kan, Kai-Zhi"

Now showing 1 - 3 of 3

Effect of interfacial layer on device performance of metal oxide thin-film transistor with a multilayer high-k gate stack
(2018-08-30)
Ruan, Dun-Bao
;
Liu, Po-Tsun
;
Chiu, Yu-Chuan
;
Kuo, Po-Yi
;
Yu, Min-Chin
The amorphous indium gallium zinc oxide thin-film transistors (TFTs) with a multilayer high-k gate stack are investigated in this research. In order to achieve a high quality gate insulator for plastic flexible display application, the multilayer high-k gate stacks (SiO2/TiO2/HfO2) are deposited by a low-temperature physical vapor deposition (PVD) process. On the other hands, an interfacial layer between the high-k stack and metal oxide channel is important for the device performance. The effects of interfacial layer material (SiO2 or Ga2O3) are also discussed in this report. The devices with SiO2 interfacial layer show a high on/off current ratio of similar to 7x10(7) for its low gate leakage current, a small sub-threshold swing of 0.093 V/decade and a high field-effect mobility of similar to 37.8 cm(2)/Vs for its good interface condition and low interface defeats. This research shows that the interface engineering of multilayer PVD gate stacks is necessary for oxide TFT fabrication.
Ferroelectric, Small Bandgap and Wide Bandgap Materials for Ultra-Low Power Green Electronic Devices
(2016-01-01)
Chin, Albert
;
Shih, Cheng W.
;
Kan, Kai-Zhi
;
Chen, Tim
;
電子工程學系及電子研究所
The power consumption in electronic devices is the major challenge as increasing the demand of IC chips. To lower the V-DD and AC power (P-AC), both high mobility material and steep turn-on device technology are useful. The ferroelectric high-K HfZrO MOSFET can realize not only a small sub-threshold slope (SS) < 60 mV/dec for low V-DD and P-AC, but also a smaller aspect ratio FinFET. The small bandgap (E-G) Ge pMOSFET can lower the P-AC by 4 times due to its 2x higher field-effective mobility at half effective field. The high-mobility wide E-G GaN MOSFET is a candidate to lower the direct tunneling leakage current and DC power (P-DC) by orders of magnitude in future deep X-nm device. The ferroelectric high-kappa HtZrO MOSFET can also perform DRAM function with lower P-DC than existing DRAM.
Investigation of low operation voltage InZnSnO thin-film transistors with different high-k gate dielectric by physical vapor deposition
(2018-08-30)
Ruan, Dun-Bao
;
Liu, Po-Tsun
;
Chiu, Yu-Chuan
;
Kan, Kai-Zhi
;
Yu, Min-Chin
Amorphous Indium-Zinc-Tin-Oxide thin-film transistors (a-IZTO TFT) using different types of high-k materials (like HfO2, ZrO2 and Al2O3) as gate dielectric are studied in this work. All gate dielectric films were deposited by physical vapor deposition (PVD) process for better composition control. Compared with the traditional SiO2 gate insulator, a high-k gate dielectric can reduce the operation voltage of TFT device significantly. The TFT device with ZrO2 gate insulator exhibits a small subthreshold swing of 0.126 V/decade, high field-effect mobility of similar to 40.7 cm(2)/Vs, low threshold voltage of -0.05 V, and large On/Off current ratio of similar to 1.01 x 10(7). The mechanisms for electrical improvements are also investigated. These results demonstrate the potential application of PVD-deposited ZrO2 thin film as a promising gate dielectric in oxide-based thin-film transistors.