Browsing by Author "Kao, HL"

Now showing 1 - 11 of 11

AC power loss and signal coupling in very large scale integration backend interconnects
(2006-04-01)
Chen, CC
;
Kao, HL
;
Liao, CC
;
Chin, A
;
McAlister, SP
Both the coupling and AC power losses in integrated circuit interconnects in the radio-frequency regime have been measured. The AC power loss decreases with decreasing length, decreasing spacing, and increasing inter metal dielectric (IMD) thickness of parallel metal lines. The unwanted signal coupling and cross-talk monotonically decrease with increasing spacing and decreasing length of the parallel metal lines. However, increasing the IMD thickness from 0.7 to 6 mu m improves the low frequency performance but not the maximum operation frequency. Using a high-resistivity Si (HRS) substrate the AC power loss is significantly reduced but is traded off with an increase in coupling loss. The most effective method of reducing both the AC power and coupling losses is the combined use of three dimensional (3D) integration and an HRS, which gives larger than 1-2 orders of magnitude improvement, up to 20 GHz.
Electrical-stress effects and device modeling of 0.18-mu m RF MOSFETs
(2006-04-01)
Kao, HL
;
Chin, A
;
Liao, CC
;
Chen, CC
;
McAlister, SP
in this paper, a novel microstrip-line layout is used to make accurate measurements of the minimum noise figure (NFmin) of RF MOSFETs. A low NFmin of 1.05 dB at 10 GHz was directly measured for 16-finger 0.18-mu m MOSFETs, without de-embedding. Using an analytical expression for NFmin, we have developed a self-consistent dc current-voltage, S-parameter, and NF in model, where the simulated results match the measured device characteristics well, both before and after electrical stress.
High performance metal-gate/high-kappa, MOSFETs and GaAs compatible RF passive devices on Ge-on-Insulator tlechnology
(2004)
Chin, A
;
Kao, HL
;
Yu, DS
;
Liao, CC
;
Zhu, C
We propose and demonstrate a new VLSI structure using high performance metal-gate/high-kappa MOSFETs and high-Q RF passive devices on Ge-on- Insulator (GOI) platform. In additional to high RF performance passive devices on insulating Si formed by ion implantation. the metal-gate/(La)AiO(3)/GOI MOSFETs have 1.7-2.0X improved electron and hole mobility with the merits of minimizing interfacial reaction., high-kappa crystallization, Fermi-level pinning, and impurity diffusion due to low thermal budget of 500 degrees C RTA.
Low noise and high gain RF MOSFETs on plastic substrates
(2005)
Kao, HL
;
Chin, A
;
Huang, CC
;
Hung, BF
;
Chiang, KC
A low minimum noise figure (NFmin) of 1.2 dB and high associated gain of 12.8 dB at 10 GHz, were measured for 0.18 mu m RF MOSFETs on plastic, made by substrate thinning (similar to 30 mu m), transfer and bonding. The performance can be further improved to 0.96 dB NFmin and 14.1 dB associated gain at 10 GHz, under applied tensile strain, using flexible Si on plastic. A 3.5 nH inductor on plastic showed a 55% higher Q-factor with a wider frequency range, compared with that on a Si substrate.
Low noise RF MOSFETs on flexible plastic substrates
(2005-07-01)
Kao, HL
;
Chin, A
;
Hung, BF
;
Lee, CF
;
Lai, JM
We report a low minimum noise figure (NFmin) of 1.1 dB and high associated gain (12 dB at 10 GHz) for 16 gate-finger 0.18-mu m RF MOSFETs, after thinning down the Si substrate to 30 mu m and mounting it on plastic. The device performance was improved by flexing the substrate to create stress, which produced a 25% enhancement of the saturation drain current and lowered NFmin to 0.92 dB at 10 GHz. These excellent results for mechanically strained RF MOSFETs on plastic compare well with 0.13-mu m node (L-g = 80 nm) devices.
Modeling RF MOSFETs after electrical stress using low-noise microstrip line layout
(2005)
Kao, HL
;
Chin, A
;
Lai, JM
;
Lee, CF
;
Chiang, KC
A novel microstrip line layout is developed to direct measure the min. noise figure (NFmin) accurately instead of the complicated de-embedding procedure in conventional CPW line. Very low NFmin of 1.05 dB at 10 GHz is directly measured in 16 gate fingers 0.18 mu m MOSFETs without any de-embedding. Based on the accurate NFmin measurement, we have developed the self-consistent DC, S-parameters and NFmin model to predict device characteristics after the continuous stress with good accuracy.
Performance and potential of germanium on insulator field-effect transistors
(2006-05-01)
Yu, DS
;
Kao, HL
;
Chin, A
;
McAlister, SP
;
電子工程學系及電子研究所
The performance of field-effect transistors may be improved by increasing the channel mobility. Strained Si can accomplish this but Ge is another option. Here we show data for germanium-on-insulator (GOI) devices and also describe the simple bonding process which was used in the device fabrication. The GOI devices show better mobilities than their Si counterparts. We also show data for some metal-gate/high-kappa dielectric devices on a GOI layer fabricated on a processed Si wafer. Here the GOI structure and processing does not alter the underlying Si devices and yet gives devices whose mobilities exceed those of Si devices. Simulations support the view that the improved performance results from the mobility enhancement and that the performance should also hold for submicron devices. (c) 2006 American Vacuum Society.
Physics and modeling of Ge-on-Insulator MOSFETs
(2005)
Chin, A
;
Kao, HL
;
Tseng, YY
;
Yu, DS
;
Chen, CC
We have used process and device simulation tools (T-Supreme and Medici) to analyze the measured DC characteristics of Ge-on-Insulator (GOI) MOSFETs. The GOI devices have higher drive current than do their Si counterparts, due to the smaller effective mass (m) and smaller Ge energy bandgap - however this also causes a larger off-state I(ds) leakage current. The simulations predict that the GOI MOSFETs have better RF gain and noise performance compared with Si devices. This is important for high speed operation as down-scaling continues.
Strain-induced very low noise RF MOSFETs on flexible plastic substrate
(2005)
Kao, HL
;
Chin, A
;
Hung, BF
;
Lai, JM
;
Lee, CF
Using microstrip line design to screen substrate resistance generated RF noise, very low 1.1 dB min. noise figure (NFmin) and high 12 dB associate gain are measured at 10 GHz of 0.18 mu m MOSFET on plastic without de-embedding. The die on plastic was thinned to 30 mu m that allows applying uniaxial strain to further lower the 10 GHz NFmin to only 0.92 dB and comparable well with the 0.13 mu m and 90nm nodes MOSFETs.
Very high density RF MIM capacitor compatible with VLSI
(2005)
Chiang, KC
;
Lai, CH
;
Chin, A
;
Kao, HL
;
McAlister, SP
We have fabricated RF MIM capacitors, using high-kappa TiTAO as the dielectric, which show a record high density of 20 fF/mu m(2). In addition, the capacitors display a small capacitance reduction of only 3.6% over the 100 kHz to 20 GHz range, a low leakage current of 8 pA and a high Q of 120. This was for a typical large 8 pF TiTaO MINI capacitor. The small voltage dependence of the capacitance (Delta C/C) of 770 ppm at 2 GHz, shows that these MIM capacitors are useful for high-precision RF circuits.
Very low noise RIF nMOSFETs on plastic by substrate thinning and wafer transfer
(2005-11-01)
Kao, HL
;
Hung, BF
;
Chin, A
;
Lai, JM
;
Lee, CF
A very low minimum noise figure (NFmin) of 1.2 dB and a high associated gain of 12.8 dB at 10 GHz were measured for six-finger, 0.18-mu m radio frequency (RF) metal-oxide semiconductor field-effect transistors mounted on insulating plastic following substrate-thinning (similar to 30 mu m) and wafer transfer. Before this process, the devices had a slightly better RF performance of 1.1-dB NFmin anda 13.7-dB associated gain. The small RF performance degradation of the active transistors transferred to plastic shows the potential of integrating electronics onto plastic.