Browsing by Author "Kuo, Chia-Hao"

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A Novel Scheme for Fabricating CMOS Inverters With Poly-Si Nanowire Channels
(2012-06-01)
Kuo, Chia-Hao
;
Lin, Horng-Chih
;
Lee, I-Che
;
Cheng, Huang-Chung
;
Huang, Tiao-Yuan
A novel complementary metal-oxide-semiconductor inverter with poly-Si nanowire channels is proposed and demonstrated in this letter. The scheme employs a clever tilted-angle implant process in the fabrication; therefore, the formation of the source and drain of both p-channel and n-channel devices requires only one lithographic step. The fabricated n-channel and p-channel field-effect transistors in the inverters show a high ON/OFF current ratio, an acceptable subthreshold swing, and a symmetric driving current, thus enabling the realization of excellent characteristics of the inverters.
Characterisation of a suspended nanowire channel thin-film transistor with sub-100 nm air gap
(2011-07-01)
Kuo, Chia-Hao
;
Hsu, Chia-Wei
;
Lin, Horng-Chih
;
Huang, Tiao-Yuan
;
電子工程學系及電子研究所
A novel suspended nanowire (NW) channel thin-film transistor (TFT) with sub-100 nm air gap has been fabricated and characterised. With a simple and low-cost over-etching-time-controlled reactive ion etching technique and a buffered-oxide etch wet-etching process, a suspended NW of 27 nm and an air gap of 10 nm were achieved. The resultant suspended-NW-channel TFTs showed an ultra-low subthreshold swing (52 mV/dec) and considerable hysteresis window (3.7 V). Finally, the impacts of device dimensions on the characteristics of suspended NW TFTs were also investigated.
Fabrication and characterization of field-effect transistors with suspended-nanowire channels
(2014-05-01)
Kuo, Chia-Hao
;
Lin, Horng-Chih
;
Huang, Tiao-Yuan
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
Novel field-effect transistors (FETs) configured with suspended-nanowire (NW) channels were fabricated and characterized. Owing to the small aspect ratio of the etched structure, a simple wet etching process was adopted to release the NW channels. Our results show that the stiction issue can be eliminated as the channel length is sufficiently short or the air gap is sufficiently thick. In addition, the specific trends in pull-in and pull-out voltages as well as subthreshold swing (SS) with varying air gap thicknesses were investigated in terms of hysteresis characteristics. Finally, the devices were shown to withstand more than 500 cycles of operation in the cycling tests with repeatable hysteresis characteristics. (C) 2014 The Japan Society of Applied Physics
Operation of a Novel Device With Suspended Nanowire Channels
(2010-05-01)
Lin, Horng-Chih
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Kuo, Chia-Hao
;
Li, Guan-Jang
;
Su, Chun-Jung
;
Huang, Tiao-Yuan
We investigate the operation of a new device featuring a side-gate scheme and suspended poly-Si nanowire (NW) channels. The fabrication adopted a sidewall-spacer-etching technique to form the poly-Si NW channels. The NW channels were further suspended using a simple wet-etching step. An interesting hysteresis phenomenon is observed in the I-V characteristics. In addition, a steep subthreshold swing (< 60 mV/dec) is also observed in the transfer curves. A scenario is proposed to explain the operation of such a device.
Performance Enhancement of Thin-Film Transistors With Suspended Poly-Si Nanowire Channels by Embedding Silicon Nanocrystals in Gate Nitride
(2012-03-01)
Kuo, Chia-Hao
;
Lin, Horng-Chih
;
Huang, Tiao-Yuan
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
In this letter, we fabricated and characterized thin-film transistors with a suspended poly-Si nanowire (NW) channel and gate nitride with embedded silicon nanocrystals (Si NCs). The embedded Si NCs increase the surface roughness, thus reducing the adhesive force as the nitride is in contact with the poly-Si NW channel during the operation. Such a feature results in a reduction in pull-in voltage and sharper pull-out behavior. Moreover, this approach also greatly improves the endurance characteristics of the devices.