Browsing by Author "Kuo, PY"

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A study of parasitic resistance effects in thin-channel polycrystalline silicon TFTs with tungsten-clad source/drain
(2003-08-01)
Zan, HW
;
Chang, TC
;
Shih, PS
;
Peng, DZ
;
Kuo, PY
With selectively-deposited tungsten film grown on source/drain regions, the parasitic source/drain resistance of thin-channel polycrystalline silicon (poly-Si) thin film transistors can be greatly reduced, leading to the improvement of device driving ability. After extracting the parasitic resistance from characteristics of devices with different channel length, the influences of parasitic resistance on device performances were discussed. A physically-based equation containing the parasitic resistance effects was derived to explain the behavior of linear transconductance under high gate voltage. Good agreements were found between calculated and measured data for both the thin-channel devices with or without tungsten-clad source/drain structure.
High-performance poly-Si TFTs with fully Ni-self-aligned silicided S/D and gate structure
(2006-04-01)
Kuo, PY
;
Chao, TS
;
Wang, RJ
;
Lei, TF
;
電子工程學系及電子研究所
In this letter, fully Ni self-aligned silicided (fully Ni-salicided) source/drain (S/D) and gate polycrystalline silicon thin-film transistors (FSA-TFTs) have been successfully fabricated on a 40-nm-thick channel layer. Experimental results show that the FSA-TFTs give increased ON/OFF current ratio, improved subthreshold characteristics, less threshold voltage rolloff, and larger field-effect mobility compared with conventional TFTs. The FSA-TFTs exhibit small S/D and gate parasitic resistance and effectively suppress the floating-body effect and parasitic bipolar junction transistor action. The characteristics of the FSA-TFTs are suitable for high-performance driving TFTs with good output characteristics and large breakdown voltage.
Short-channel poly-Si thin-film transistors with ultrathin channel and self-aligned tungsten-clad source/drain
(2004)
Zan, HW
;
Chang, TC
;
Shih, PS
;
Peng, DZ
;
Kuo, PY
A short-channel polycrystalline silicon (poly-Si) thin-film transistor (W/L=10 mum/3 mum) with an ultrathin channel (30 nm) and self-aligned tungsten-clad source/drain structure is demonstrated. With WF6 and SiH4 gas flow ratio of 40/12, selectively deposited tungsten film over 100 nm thick can be easily grown on source/drain regions. As a result, the parasitic source/drain resistance is greatly reduced, leading to improvement of device driving ability. Because tungsten deposition can be carried out at a low processing temperature of 300degreesC, the proposed simple structure is compatible with conventional top-gate structure and can be readily applied to low-temperature poly-Si fabrication. (C) 2003 The Electrochemical Society.
Suppression of the floating-body effect in poly-Si thin-film transistors with self-aligned Schottky barrier source and ohmic body contact structure
(2004-09-01)
Kuo, PY
;
Chao, TS
;
Lei, TF
;
電子工程學系及電子研究所
;
奈米中心
In this letter, we developed a new self-aligned Schottky barrier source and ohmic body contact (SSOB) method that can effectively suppress the floating-body effect in poly-Si thin-film transistors (TFTs). Experimental results,show that the SSOB-TFTs give higher output resistance, less threshold voltage variation, improved subthreshold characteristics, and larger breakdown voltage compared with conventional TFTs. The characteristics of the SSOB-TFTs are suitable for high-performance driving TFTs with a high output resistance and large breakdown voltage.