Browsing by Author "LAN, WH"

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FIELD-INDUCED JUNCTION IN INSB GATE-CONTROLLED DIODES
(1991-01-01)
LAN, WH
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TU, SL
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CHERNG, YT
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PANG, YM
;
YANG, SJ
InSb gate-controlled diodes were fabricated to study breakdown behavior and surface effects. I-V characteristics were measured as a function of gate voltage and temperature. The results indicated that a field-induced junction was formed as the negative bias exceeded -4 V. The field induced junction was found to have a breakdown voltage smaller than that of the metallurgical junction. Saturation of the breakdown current in the field-induced junction was also observed, which could be explained by the conducting channel effect similar to that in the metal oxide semiconductor field effect transistor (MOSFET). The reverse current was also measured as a function of temperature to study the leakage mechanism. The strong exponential temperature dependence suggested that the reverse current was dominated by the G-R mechanism.
HIGH BREAKDOWN P-CHANNEL INSB MOSFET
(1990-03-01)
TU, SL
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LAN, WH
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CHIOU, TS
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YANG, SJ
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HUANG, KF
INFRARED SPECTROSCOPIC STUDY OF MERCURY-SENSITIZED PHOTO-CVD SILICON-OXIDE
(1990-06-01)
LAN, WH
;
TU, SL
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YANG, SJ
;
HUANG, KF
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電子物理學系
REACTION-MECHANISM OF MERCURY-SENSITIZED PHOTOCHEMICAL VAPOR-DEPOSITED SILICON-OXIDE
(1993-01-01)
LAN, WH
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LIN, WJ
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TU, SL
;
YANG, SJ
;
HUANG, KF
The deposition mechanism for silicon oxide (SiOx) films grown by the mercury-sensitized photochemical vapor deposition (photo-CVD) method using silane (SiH4) and nitrous oxide (N2O) under irradiation of a low-pressure mercury lamp has been studied. An increasing-naximum-decrease pattern of the deposition rate with increasing silane partial pressure ratio (P(s)=P(SiH4)/P(total)) has been observed. Deposition rates for the SiO-like and SiO2-like films have been analyzed based on the Langmuir-Hinshelwood surface reaction theory. Rate equations were also derived. By means of the Arrhenius plots, activation energy of the surface reaction and the heat of adsorption can be determined.
RECESSED-GATE ALGAAS/INGAAS/GAAS PSEUDORMORPHIC HEMT WITH SI-PLANAR-DOPED ETCH-STOP LAYER
(1995-03-30)
LAN, WH
;
LIN, WJ
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PENG, CK
;
CHEN, SS
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TU, SL
An improved slot etch technique based on an Si planar doped laver has been applied to gate recessing in the fabrication of AlGaAs/InGaAs/GaAs pseudomorphic high electron mobility transistors (HEMTs). The devices exhibited comparable g(m) with much better breakdown and leakage behaviour than conventional pseudomorphic HEMT devices.