Browsing by Author "LIU, IO"

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A STUDY ON BILATERAL LATCH-UP SELF-TRIGGERING IN COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR PROTECTION CIRCUITS
(1994-01-01)
HUANG, HS
;
CHANG, CY
;
CHEN, KL
;
LIU, IO
;
HSU, CC
The results of serial studies on the behavior of bilateral latch-up in complementary metal-oxide-semiconductor field effect transistor (CMOS) protection circuits are presented. Bilateral latch-up self-triggering resulting from serial resistance or serial inductance on V-dd or V-ss is discussed. Optimizing the layout and design of output buffers to improve product performance and reliability is also recommended. The studies on the behavior of bilateral latch-up in CMOS protection circuits are increasingly important since low-power applications are the future trend.