Browsing by Author "LIU Po-Tsun"

Now showing 1 - 7 of 7

Analog Memory Cell Circuit for the LTPS TFT-LCD
(2013-12-05)
LIU Po-Tsun
;
CHU Li-Wei
;
ZHENG Guang-Ting
The present invention provides an analog memory cell circuit for the LTPS TFT-LCD. The circuit comprises the first transistor, second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, the seventh transistor, and the capacitor. It comprises a plurality of operation period, wherein the transistors are controlled in accordance with the first scan signal, the second scan signal, and the third scan signal, the output signal is output in the opposite to the output jack.
ANALOG MEMORY CELL CIRCUIT FOR THE LTPS TFT-LCD
(2012-12-13)
LIU Po-Tsun
;
Chu Li-Wei
;
Zheng Guang-Ting
The present invention provides an analog memory cell circuit for the LTPS TFT-LCD. The circuit comprises the first transistor, second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, the seventh transistor, and the capacitor. It comprises a plurality of operation period, wherein the transistors are controlled in accordance with the first scan signal, the second scan signal, and the third scan signal, the output signal is output in the opposite to the output jack.
FLEXIBLE NON-VOLATILE MEMORY
(2014-03-06)
LIU Po-Tsun
;
FAN Yang-Shun
A manufacturing method for manufacturing a flexible non-volatile memory is provided. The manufacturing method comprises the steps outlined below. A flexible substrate is provided. A planarization layer is formed on the flexible substrate. A metal bottom electrode layer is deposited on the planarization layer. A mask is formed to define a plurality of patterns. An AZTO layer having a plurality of electrically independent AZTO cells is deposited on the metal bottom electrode layer corresponding to the patterns. A top electrode layer is deposited on the AZTO layer corresponding to the AZTO cells to form a plurality of non-volatile memory cells.
METHOD FOR FABRICATING SEMICONDUCTOR DEVICE
(2014-09-25)
LIU Po-Tsun
;
TENG Li-Feng
;
LO Yuan-Jou
;
LEE Yao-Jen
A method for fabricating a semiconductor device is disclosed in the present invention. The abovementioned method comprises the following steps. Firstly, a gate is formed on a substrate. A gate insulating layer is then formed on the gate, and further an active layer is disposed on the gate insulating layer, wherein the active layer is composed of a microwave absorbing material. Source/drain is defined on the active layer to form the semiconductor device, and a microwave annealing process is finally performed thereon.
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
(2014-07-10)
LIU Po-Tsun
;
WANG Wei-Ya
;
TENG Li-Feng
The present invention provides a method of manufacturing a semiconductor device. The method at least comprises the following steps. First, the semiconductor device, which comprises a gate, a gate dielectric layer, an active layer, a source and a drain, is manufactured. However, the semiconductor device has a plurality of defects, and the active layer is a metal oxide thin film. After annealing the semiconductor device, it will be transferred into a chamber. A final step of injecting a supercritical fluid carried with a co-solvent into the chamber is then performed to modify the abovementioned defects.
RESISTIVE RANDOM ACCESS MEMORY DEVICE AND OPERATING METHOD THEREOF
(2014-05-15)
LIU Po-Tsun
;
HSU Ching-Hui
;
FAN Yang-Shun
A resistive random access memory (RRAM) device and operating method are disclosed herein. The RRAM device includes at least one RRAM cell and a control circuit. The RRAM cell includes a bottom electrode, an amorphous Indium-Gallium-Zinc-Oxide (a-IGZO) layer, a Ti layer and a top electrode. The a-IGZO layer is disposed on the bottom layer. The Ti layer is disposed on the a-IGZO layer. The top electrode is disposed on the Ti layer. The control circuit is configured to provide at least one electrical signal to the RRAM cell, so as to change the resistance value of the RRAM cell.
Thin film Transistor with UV light Absorber Layer
(2014-12-11)
SHIEH Han-Ping D.
;
LIU Po-Tsun
;
TSAI Yun-Chu
;
TSAI Min-Yen
;
TENG Li-Feng
A thin film transistor comprises a transparent substrate, a gate is disposed on the transparent substrate, a gate insulator is disposed on the gate and the transparent substrate, an active layer is disposed on the gate insulator, an electrode layer is electrically connected the active layer and the portion of the active layer is exposed, and an ultraviolet light absorbing layer is disposed on the electrode layer. By using the advantage of the ultraviolet light absorbing layer with the range of visible light transmittance and with the component protection, preventing the optical characteristics of the thin film transistor from the outside moisture is achieved, and by adjusting the parameters in the thin film deposition process to change its conductivity.