Browsing by Author "LO, SH"

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2-DIMENSIONAL SIMULATION OF ORIENTATION EFFECTS IN SELF-ALIGNED GAAS-MESFETS
(1990-10-01)
LO, SH
;
LEE, CP
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交大名義發表
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電控工程研究所
;
National Chiao Tung University
2-DIMENSIONAL SIMULATION OF THE DRAIN-CURRENT TRANSIENT EFFECT IN GAAS-MESFETS
(1991-04-01)
LO, SH
;
LEE, CP
;
交大名義發表
;
電控工程研究所
;
National Chiao Tung University
A two-dimensional numerical analysis of the drain-current transient behavior of ion-implantation GaAs MESFETs on undoped semi-insulating substrates is presented. It is found that the EL2 traps with slow transient behaviors play an important role in the drain lag effects. Also, the current overshoot and undershoot can be explained by the capture and the emission of electrons through the EL2 traps, respectively.
ANALYSIS OF SURFACE-STATE EFFECT ON GATE LAG PHENOMENA IN GAAS-MESFETS
(1994-09-01)
LO, SH
;
LEE, CP
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電控工程研究所
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Institute of Electrical and Control Engineering
A two-dimensional transient simulation of the gate lag phenomenon in GaAs MESFET's has been performed. Our results show that the charge exchanges in the population of the surface states at the ungated access region of FET's are responsible for this slow transient phenomenon. The measured ''hole-trap-like'' DLTS signal is directly related to the re-emission of the holes, trapped during the filling pulse. Higher gate pulse can cause more serious lag phenomenon due to larger modulation of surface charge density. Devices with shorter N+-gate spacing and lower surface state densities are shown to have less gate lag effect.
NUMERICAL-ANALYSIS OF THE FREQUENCY-DEPENDENT OUTPUT CONDUCTANCE OF GAAS-MESFETS
(1991-08-01)
LO, SH
;
LEE, CP
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物理研究所
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電控工程研究所
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Institute of Physics
The small-signal output conductance of GaAs MESFET's on semi-insulating substrate has been studied using two-dimensional numerical analysis. Frequency-, temperature-, and drain-bias-dependent behaviors of the output conductance are analyzed. It is confirmed that the bulk EL2 traps contribute significantly to the low-frequency-dependent behavior of the output conductance. Devices with different background trap concentration and acceptor concentration have been analyzed and compared. For devices with higher trap concentration and higher acceptor concentration, the output conductance is lower but exhibits stronger frequency dependence.
NUMERICAL-ANALYSIS OF THE LOOPING EFFECT IN GAAS-MESFETS
(1992-02-01)
LO, SH
;
LEE, CP
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電子工程學系及電子研究所
;
奈米中心
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Department of Electronics Engineering and Institute of Electronics
The looping effect in the I(D)-V(D) characteristics of GaAs MESFET's on semi-insulating substrates has been studied using a two-dimensional numerical analysis. Both the transient and the steady-state behaviors of the looping phenomenon are simulated and discussed. Peak voltage- and frequency-dependent behaviors of the looping effect are analyzed. The I(D)-V(D) loop is due to the difference in the distribution of ionized EL2 concentration when the drain voltage rises and falls because of the trapping process of EL2's. The output conductance is also found to be frequency-dependent and is explained by the frequency-dependent modulation of the potential barrier height at the channel/substrate interface due to the drain-voltage variation.
NUMERICAL-ANALYSIS OF THE PHOTOEFFECTS IN GAAS-MESFETS
(1992-07-01)
LO, SH
;
LEE, CP
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電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
The photoeffects on the I-V characteristics of GaAs MESFET's have been studied by a two-dimensional numerical method. It is theoretically verified that the photovoltaic effect occurring at the channel/substrate interface is responsible for the substantial increase of the drain current. The reverse gate current due to illumination is caused by sweep-out by the high electrical field in the gate depletion region, where a large gradient in the depth profile of the hole Fermi energy is found. For devices with a lightly doped n-type buffer layer, the increase of the drain current is less than for devices without a buffer layer, but is still substantial.