Browsing by Author "Lai, CS"

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A new insight into the degradation mechanisms of various mobility-enhanced CMOS devices with different substrate engineering
(2005)
Chung, SS
;
Liu, YR
;
Wu, SJ
;
Lai, CS
;
Liu, YC
In this paper, the difference in degradation mechanism for different substrate engineered CMOS devices has been reported for the first time. These two different substrate engineering includes hybrid substrate engineering, with (100) and (110) orientations, and strained-Si devices. Different mechanisms are responsible for these two different mobility enhancement schemes. For strained-Si devices, it shows that the dominant mechanism for HC(Hot Carrier) and NBT (Negative Bias Temperature) degradations is attributed to the lateral electric field resulting from the mobility enhancement. While for (110)/(100) substrate engineered devices, the dominant mechanism is due to the dangling bond of the surface. In other words, for (I I 0)/(l 00) substrate, the device degradation is weakly dependent on the mobility enhancement while largely dependent on the bond strength. Finally, the difference in temperature dependence of HC and NBT has also been observed for both strained-Si and (110)/(100) substrate devices. Sophisticated measurement techniques, charge pumping (CP) and gated-diode (GD) measurement, have been employed to understand these device mechanisms. These results provide a guideline for the device design and the understanding of related reliabilities in the popular strained-Si and hybrid substrate technology CMOS devices.
A new observation of the germanium outdiffusion effect on the hot carrier and NBTI reliabilities in sub-100nm technology strained-Si/SiGe CMOS devices
(2005)
Chung, SS
;
Liu, YR
;
Yeh, CF
;
Wu, SR
;
Lai, CS
In this paper, the evidence of SiGe layer induced trap generation and its correlation with enhanced degradation in strained-Si/SiGe CMOS devices have been reported for the first time. First, a new two-level charge pumping(CP) curve has been demonstrated to identify the Ge out-diffusion effect. Secondly, enhanced degradation in strained-Si devices has been clarified based on experimental results. Both n- and p-MOSFE's exhibit different extent of HC degradation effect. This is attributed to the difference in their mobility enhancement as well as additional traps coming from the Si/SiGe interface. Finally, temperature dependence of HC and NBTI has been examined for both strained-Si and bulk devices. Sophisticated measurement techniques, charge pumping and gated-diode (GD) measurements, have been employed to understand the generated interface traps. Results show that strained-Si device is less sensitive to the temperature and has a chance for better NBTI reliability if we have a good control of the strained-Si/SiGe interface, such as through low temperature gate oxide process or better S/D junction formation.
A novel vertical bottom-gate polysilicon thin film transistor with self-aligned offset
(1996-05-01)
Lai, CS
;
Lee, CL
;
Lei, TF
;
Chern, HN
;
電子工程學系及電子研究所
A novel device structure for the vertical bottom polysilicon gate thin film transistor (TFT) with a self-align offset drain is proposed and demonstrated, The new VTFT allows a deep-submicron channel length, which is determined by the thickness of the active polysilicon film, not by the lithographic system resolution, The self-alignment offset drain reduces the leakage current, as a result, it exhibits good device performance.
Chain dynamics of concentrated polystyrene solutions studied by depolarized photon-correlation and viscosity measurements
(1999-05-08)
Lai, CS
;
Juang, JH
;
Lin, YH
;
應用化學系
;
Department of Applied Chemistry
Concentrated solutions of nearly monodisperse polystyrene samples in cyclohexane in the theta condition and in the entanglement-free region have been studied by means of the depolarized photon-correlation spectroscopy and viscosity measurements. It is shown that the viscoelastic behavior of the studied systems is described by the Rouse theory and that in agreement with the theoretical analysis the main polymer dynamic process probed by the depolarized Rayleigh scattering is basically the reorientational motion associated with a Rouse segment of the polymer chain, whose relaxation is independent of the scattering angle and the molecular weight. In addition to the main dynamic process, the tail region of a very fast process associated with the sub-Rouse-segmental motions can be observed, whose existence is expected from the theoretical analysis. (C) 1999 American Institute of Physics. [S0021-9606(99)51817-5].
Characteristics of fluorine implantation for HfO2 gate dielectrics with high-temperature postdeposition annealing
(2006-04-01)
Lai, CS
;
Wu, WC
;
Wang, JC
;
Cha, TS
;
物理研究所
In this work, we describe the characteristics of silicon surface fluorine implantation (SSFI) for HFO2 films with high-temperature postdeposition annealing. The thermal stability of HfO2 gate dielectrics is much improved owing to the incorporation of fluorine into HfO2 thin films. The gate leakage current of the SSFI HfO2 films is about three orders less than that of samples without any fluorine implantation. In addition, improvements in stress-induced leakage current (SILC) and charge trapping characteristics are realized in the HfO2 films with the SSFI. The incorporation of fluorine atoms into the HfO2 films reduces not only interface dangling bonds but also bulk traps, which is responsible for the improvements in properties.
Characterization of CF4-plasma fluorinated HfO2 gate dielectrics with TaN metal gate
(2005-05-30)
Lai, CS
;
Wu, WC
;
Wang, JC
;
Chao, T
;
物理研究所
In this paper, fluorine incorporation into the HfO2 gate dielectrics by post CF4 plasma treatment was proposed to improve the electrical characterization. TaN-HfO2-p-Si capacitors were demonstrated in this work. The characteristics of fluorinated HfO2 gate dielectrics were improved, including the capacitance-voltage hysteresis and current-voltage behaviors. This may be attributed to the fluorine incorporated into the HfO2 gate dielectrics as revealed by secondary ion mass spectroscopy. Moreover, the formation of Hf-F bonding was observed through electron spectroscopy for chemical analysis spectra. (c) 2005 American Institute of Physics.
Characterization of polysilicon oxides thermally grown and deposited on the polished polysilicon films
(1998-04-01)
Lei, TF
;
Cheng, JY
;
Shiau, SY
;
Chao, TS
;
Lai, CS
This work examines the characteristics of polyoxides thermally grown and deposited an polished polysilicon films. A well-controlled chemical mechanical polishing (CMP) process is also presented to achieve a planar surface morphology Tot polysilicon films. The thermally-grown and deposited polyoxides on the polished polysilicon films exhibit a lower leakage current, higher dielectric breakdown field, higher electron barrier height, lower electron trapping, rate, lower density of trapped charges, and markedly higher charge to breakdown (Q(bd)) than the conventional polyoxide. In particular, the deposited polyoxide on the polished polysilicon film has the highest dielectric breakdown field, lowest electron trapping rate, and highest charge to breakdown due to the planar polyoxide/polysilicon interface. In addition, experimental results indicate that the trapped charges of the polished samples are located in the polyoxides' upper portion, which differs from conventional polyoxides. Undoubtedly, the deposited polyoxide on the polished polysilicon film considered herein is the most promising candidate to yield optimum characteristics of polyoxide.
Dynamics of a ''Rouse'' segment as probed by depolarized photon-correlation and viscoelasticity measurements
(1996-07-15)
Lin, YH
;
Lai, CS
;
交大名義發表
;
應用化學系
;
National Chiao Tung University
A polystyrene melt, whose molecular weight (weight-average molecular weight = 1050) is about that estimated for a Rouse segment;, has been studied with depolarized photon-correlation and viscosity measurements. Theoretically the dynamic depolarized light scattering is shown to be affected by the reorientational motion of the whole polymer molecule in the long-time region and the local segmental motions in the short-time region. The elastic dumbbell model is used to describe the viscoelasticity and reorientational motion of the polymer molecule. Relaxation times [tau] and tau(v) are extracted from the depolarized light scattering and viscosity measurement results, respectively. The ratio tau(v)/[tau], being independent of temperature as expected, is of the order of magnitude predicted from the theoretical analysis. We come to a similar conclusion supporting the above results by analyzing the depolarized photon-correlation results and the viscoelastic relaxation data in the glass-rubber transition zone of entangled polystyrene melts, which are available in literature.
Effects of post CF(4) plasma treatment on the HfO(2) thin film
(2005-04-01)
Lai, CS
;
Wu, WC
;
Fan, KM
;
Wang, JC
;
Lin, SJ
In this study, a novel approach was proposed to improve the characterization of HfO(2). Fluorine was incorporated by CF(4) plasma to improve the HfO(2) gate dielectric properties including leakage current, breakdown voltage and hysteresis. The hysteresis of capacitance-voltage characteristics can be reduced to approximately 10% hysteresis voltage for the samples with CF(4) plasma treatment. An inner-interface trapping model is presented to explain the hysteresis. The secondary-ion mass spectroscopy (SIMS) results show that there is a significant incorporation of fluorine (F) at the interface between the HfO(2) thin film and silicon substrate. The incorporation of F effectively suppressed leakage current and improved carrier trapping without an increase in interfacial layer thickness.
High reliability polyoxide fabricated by using TEOS oxide deposited on disilane polysilicon film
(2001-04-01)
Lee, JW
;
Lee, CL
;
Lei, TF
;
Lai, CS
;
電子工程學系及電子研究所
This paper reports the TEOS oxide deposited on the polysilicon film which was prepared by using the disilane chemical vapor deposition. Compared to the thermally grown oxide or TEOS (tetra-ethyl-ortho-silicate) oxide deposited on the conventional silane polysilicon him, it had symmetrical J-E characteristics that had lower leakage currents but much higher breakdown field, a lower electron trapping rate, and a much larger charge to breakdown. These good properties are attributed to the smoother surface of the deposited disilane poly-I film and the more incorporation of nitrogen during the rapid thermal annealing (RTA) in N2O ambient. It is suitable to be as the inter-polyoxide of the electrically-erasable programmable read only memory (EEPROM).
Impact of STI on the reliability of narrow-width pMOSFETs with advanced ALD N/O gate stack
(2006-03-01)
Chung, SS
;
Yeh, CH
;
Feng, HJ
;
Lai, CS
;
Yang, JJ
For the first time, a shallow trench isolation (STI)-induced enhanced degradation in pMOSFETs for ultrathin gate oxide devices has been observed. The ID degradation is enhanced as a reduction in the gate width and the hot carrier (HC) or negative bias temperature instability (NBTI) effect. Extensive studies have been compared for atomic layer deposition (ALD)-grown and plasma-treated oxide pMOSFETs. Different temperature dependences were observed. At room temperature, hole trap is dominant for the device degradation, in which holetrap-induced V-T is significant, whereas at high temperature under NBTI stress, interface trap becomes more significant, which dominates the device ID degradation. In addition, the V-T rolloff can be modeled as a width narrowing effect specifically for STI. More importantly, the NBTI-induced interface/oxide traps are strongly related to the hydrogen and N-2 content in the gate oxide formation process. The interface trap generation is suppressed efficiently using the ALD-grown gate oxide. These results provide a valuable guideline for the understanding of the HC and NBTI reliabilities in an advanced ALD-grown gate oxide processes/devices.
Improvement of reliability of metal-oxide semiconductor field-effect transistors with N2O nitrided gate oxide and N2O polysilicon gate reoxidation
(1998-10-01)
Lai, CS
;
Chao, TS
;
Lei, TF
;
Lee, CL
;
Huang, TY
A systematic study of the impact of the reliability of metal-oxide semiconductor field-effect transistors (MOSFETs) with N2O nitrided gate oxides and N2O poly-reoxidation was conducted. The improvements include hot carrier immunity, suppression of reverse short channel effect and suppression of plasma-induced degradation. These improvements are due to nitrogen incorporation at the oxide/Si-substrate interface. All data presented in this study involve substantially low thermal budget (850 degrees C), making this N2O-related technology extremely attractive and promising for future scaled devices.
Improvement of reliability of metal-oxide semiconductor field-effect transistors with N2O nitrided gate oxide and N2O polysilicon gate reoxidation
(1998-10-01)
Lai, CS
;
Chao, TS
;
Lei, TF
;
Lee, CL
;
Huang, TY
A systematic study of the impact of the reliability of metal-oxide semiconductor field-effect transistors (MOSFETs) with N2O nitrided gate oxides and N2O poly-reoxidation was conducted. The improvements include hot carrier immunity, suppression of reverse short channel effect and suppression of plasma-induced degradation. These improvements are due to nitrogen incorporation at the oxide/Si-substrate interface. All data presented in this study involve substantially low thermal budget (850 degrees C), making this N2O-related technology extremely attractive and promising for future scaled devices.
Low temperature (850 degrees C) two-step N2O annealed thin gate oxides
(1996)
Lai, CS
;
Lee, CL
;
Lei, TF
;
Chao, TS
;
Peng, CH
The electrical characteristics of thin gate dielectrics prepared by low temperature (850 degrees C) two-step N2O nitridation (LTN) process are presented. The gate oxides were grown by wet oxidation at 800 degrees C and then annealed in N2O at 850 degrees C. The oxide with N2O anneal, even for low temperature (850 degrees C), had nitrogen incorporation at oxide/silicon interface. The charge trapping phenomena and interface-state generation (Delta D-itm) induced by constant current stressing were reduced and charge-to-breakdown (Q(bd)) under constant current stressing was increased. This LTN oxynitride was used as gate dielectric for N-channel MOSFET, whose hot-carrier immunity was shown improved and reverse short channel effect (RSCE) was suppressed.
Nitridization of the stacked poly-Si gate to suppress the boron penetration in pMOS
(1996-07-01)
Lin, YH
;
Lai, CS
;
Lee, CL
;
Lei, TF
;
Chao, TS
NH3-nitridation to create nitrogen-rich layers in-between the stacked layers of the poly-Si gate for pMOS application is proposed and demonstrated. Due to the blocking of fluorine diffusion in the poly-Si gate by the nitrogen-rich layers, the amount of fluorine in the gate oxide, consequently, the fluorine enhancement on boron penetration is reduced. The negative effects of the NH3-nitridized oxide were not found in this work. Moreover, this nitridized stacked poly-Si gate improves significantly the electrical characteristics of the gate oxide as a result of the indirect and slight nitridation at the gate oxide.
Oxide grown on polycrystal silicon by rapid thermal oxidation in N2O
(2006)
Kao, CH
;
Lai, CS
;
Lee, CL
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
In this paper, rapid thermal processing (RTP) N2O polyoxides were studied in terms of oxidation temperature and thickness with O-2 oxidation polyoxides as comparison. Atomic force microscopy, transmission electron microscopy, and secondary ion mass spectroscopy measurements were employed to correlate the electrical characteristics with the physical structures. Results showed that RTP N2O-grown polyoxides exhibited better characteristics on the leakage current, E-bd, trappings and Q(bd). It was found that it was the proper amount of nitrogen incorporated in the polyoxide improving the interface of the polyoxide/polysilicon, consequently improving the electrical quality. The initial hole-trapping phenomenon during the constant current stress, which was due to the incorporated nitrogen, was also observed in the N2O-grown polyoxides. The two-step RTP process, i.e., first RTP oxidizing the polysilicon in O-2 and then RTP oxidizing in N2O, could achieve polyoxide of good characteristics by incorporating the proper amount of nitrogen into the polyoxide. (c) 2005 The Electrochemical Society.
The impact of STI induced reliabilities for scaled p-MOSFET in an advanced multiple oxide CMOS technology
(2004)
Chung, SS
;
Yeh, CH
;
Feng, SJ
;
Lai, CS
;
Yang, JJ
In this paper, we present new results on the width dependent hot-carrier (HC) reliabilities for shallow-trench-isolated (STI) pMOSFETs in a multiple oxide CMOS technology. For the first time, different phenomena in pMOSFET for a multiple oxide process have been observed. Extensive studies have been made for ALD grown and plasma treated oxide pMOSFETs. Experimental data shows that the drain current degradation is enhanced for a reducing gate width. For thick oxide, the I-D degradation is due to the channel length shortening, and electron trap is dominant for the device degradation. While for thin gate oxide, the I-D degradation is due to width narrowing, and hole trap is dominant, in which both electron and hole trap induced V-T shifts are significant. The degradation in thick-oxide pMOSFETs causes an increase of off-state leakage Current and an increase of DeltaV(T) in thin-oxide with reduced width.
The performance indicators for science and technology projects in Taiwan
(1997-01-01)
Yang, C
;
Tarng, MY
;
Lai, CS
;
Lin, ZB
;
管理科學系
To help the Taiwanese private sector to compete globally, the Ministry of Economic Affairs (MOEA) in Taiwan initiated a programme called the 'Science and Technology Project (STP)' in 1982. Through this programme, the government offers over 10 billion NT dollars per year to support technological research and development. Furthermore, the STP is executed by statutory bodies (non-profit research institutes) funded by the MOEA. For the purposes of budget allocation and control, an annual performance evaluation of STP is needed, though it is a difficult task. Although the MOEA has established a system of performance evaluation and has practised it for years, there is no consensus on the fairness of this system among research institutes and other interested parties competing for funds. A more elegant evaluation system is needed. The purpose of this research is to establish a reliable system of performance indicators for the STP. Our study reviewed the whole performance indicators system of R&D projects and proposed a feasible revision. The system of performance indicators can be further divided into three subsystems: (1) indicators for research results, (2) indicators for industrial co-operation, (3) indicators for technology diffusion.
The performance indicators for science and technology projects in Taiwan
(1997-01-01)
Yang, C
;
Tarng, MY
;
Lai, CS
;
Lin, ZB
;
管理科學系
To help the Taiwanese private sector to compete globally, the Ministry of Economic Affairs (MOEA) in Taiwan initiated a programme called the 'Science and Technology Project (STP)' in 1982. Through this programme, the government offers over 10 billion NT dollars per year to support technological research and development. Furthermore, the STP is executed by statutory bodies (non-profit research institutes) funded by the MOEA. For the purposes of budget allocation and control, an annual performance evaluation of STP is needed, though it is a difficult task. Although the MOEA has established a system of performance evaluation and has practised it for years, there is no consensus on the fairness of this system among research institutes and other interested parties competing for funds. A more elegant evaluation system is needed. The purpose of this research is to establish a reliable system of performance indicators for the STP. Our study reviewed the whole performance indicators system of R&D projects and proposed a feasible revision. The system of performance indicators can be further divided into three subsystems: (1) indicators for research results, (2) indicators for industrial co-operation, (3) indicators for technology diffusion.
The TEOS CVD oxide deposited on phosphorus in situ doped polysilicon with rapid thermal annealing
(1997-11-01)
Kao, CH
;
Lai, CS
;
Lee, CL
;
交大名義發表
;
電子工程學系及電子研究所
A TEOS oxide deposited on the phosphorus in situ doped polysilicon annealed with RTA is shown to have good electrical characteristics such as a high breakdown field (>12 MV/cm), especially for the positive bias, and a large Qbd (26 Coul/cm(2)). The improvement is believed to be due to the relatively smooth surface of the in situ doped polysilicon and the reduction of the trapping density by RTA.