Browsing by Author "Lee, BS"

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A three-dimensional simulation of electrostatic characteristics for carbon nanotube array field effect transistors
(2005-08-01)
Li, YM
;
Chou, HM
;
Lee, JW
;
Lee, BS
;
電子物理學系
We, in this paper, study the electrostatic characteristics and the gate capacitances for carbon nanotube (CNT) array field effect transistors (FETs). The explored CNT-array FET is with three configurations of gate electrode, the top gate, the wrap around gate, and the bottom gate. Taking the pitch distance of structures and the gate length of CNT FET into consideration, a three-dimensional (3D) electrostatic simulation are performed by using an adaptive finite volume method, where different gate capacitance are calculated and compared. It is found that there is at least a 20% difference in calculating the gate capacitance between the 2D and 3D modeling and simulations. Our 3D simulation shows that a wrap around gate gives the largest gate capacitance among structures. A bottom gate possesses the weakest gate controllability. Effects of the pitch distance and the gate length on the gate capacitances of CNT-array FET are investigated. Results of the 3D electrostatic simulations can be applied to estimate the magnitude of the on-current of CNT FETs. (c) 2005 Elsevier B.V. All rights reserved.
Computer simulation of germanium nanowire field effect transistors
(2005)
Li, YM
;
Chou, HM
;
Lee, BS
;
Lu, CS
;
Yu, SM
In this paper, electrical characteristics of germanium (Ge) nanowire field effect transistors (FETs) are computationally investigated. A calibrated three-dimensional (3D) density-gradient simulation is performed to explore the electrical characteristics of Ge omega-shaped-gate FETs. The examined nanodevices are with a 70% gate coverage ratio. By evaluating the threshold voltage roll-off, the transfer characteristics, and the leakage current, our numerical results have shown that the Ge nanowire FET has potentially higher driving-capability than that of the silicon (Si) one. Due to good channel controllability of the omega-shaped-gate FET with the 70% gate coverage ratio, compared with the Si nanowire FET, the high mobility Ge nanowire FET significantly suppresses the effect of band-gap narrowing on the transport characteristics. Leakage current of the Ge nanowire FET depends upon the thickness of the gate channel film. A thinner Ge film leads to a lower leakage current. Preliminary numerical study on the Ge Nanowire FET with a propoer selection on gate material provides interesting results for the design and fabrication of high performance nanodevices in nanoelectronics era.