Browsing by Author "Lee, GW"

Now showing 1 - 2 of 2

Graph automorphism-based algorithm for determining symmetric inputs
(2004)
Chou, CL
;
Wang, CY
;
Lee, GW
;
Jou, JY
;
電子工程學系及電子研究所
We propose a graph automorphism-based algorithm for computing maximal sets of symmetric inputs of circuits. It can be used to identity nonsymmetric inputs in a circuit and enhance the efficiency of input matching, library binding, as well as logic verification problems. We conduct the experiments on some benchmarks. The experimental results demonstrate that our approach distinguishes more nonsymmetric inputs than that of previous work.
Verification on port connections
(2004)
Lee, GW
;
Wang, CY
;
Huang, JD
;
Jou, JY
;
電子工程學系及電子研究所
In a system-on-a-chip (SOC) design, several to hundreds Of design blocks or intellectual properties (IPs) are integrated to form a complex function. Prior to verify the functionality of the integrated IPs, it is very important to ensure the correctness of the port connections among these IPs. This paper addresses the problem of verification on port connections while IPs are integrated into a larger block or a system, and presents a new connection model and the corresponding error model for port connections. An algorithm providing the mininium pattern set and a general verification flow used to verify port connections are also proposed.