Browsing by Author "Lee, GY"

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Modeling and design of the high performance step SOI-LIGBT power devices by partition mid-point method
(2003-10-01)
Chang, FL
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Lin, MJ
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Lee, GY
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Chen, YS
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Liaw, CW
In this paper, a partition method is proposed to Study the high voltage devices with the step doping profile for the first time. It has been proposed that its breakdown voltage can be approached to that of the linearly graded devices with similar forward voltage drop (V-cc). In addition, by this method, the breakdown voltage can be deduced and its corresponding issue location is also fingered out in the step drift region. Furthermore. in order to reduce the undesirable additional masks, the degraded factor (D) is developed to obtain better performance with the least number of frames. Eventually, a 660 V step analytical results are compared with a 606.6 V MEDICI Simulation and this shows that the partition method is very effective. (C) 2003 Elsevier Ltd. All rights reserved.
Modeling of interconnect capacitance, delay, and crosstalk in VLSI
(2000-02-01)
Wong, SC
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Lee, GY
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Ma, DJ
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電子工程學系及電子研究所
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Department of Electronics Engineering and Institute of Electronics
Increasing complexity in VLSI circuits makes metal interconnection a significant factor affecting circuit performance. In this paper, we first develop new closed-form capacitance formulas for two major structures in very large scale integration (VLSI), namely, 1) parallel lines on a plane and 2) wires between two planes, by considering the electrical flux to adjacent wires and to ground separately. We then further derive closed-form solutions for the delay and crosstalk noise. The capacitance models agree well with numerical solutions of three-dimensional (3-D) Poisson's equation as well as measurement data. The delay and crosstalk models agree well with SPICE simulations.
Multiple tunneling and chaos in asymmetrically coupled quantum wells
(1999-11-01)
Juang, C
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Lee, GY
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Juang, J
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應用數學系
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Department of Applied Mathematics
Oscillatory and chaotic motion of heavy to light hole mixing tunneling in asymmetrically coupled quantum well structures is determined by two competing processes: HHa to LHa and HHa to LHb. Chaotic behavior occurs if the two processes ale compatible. Oscillatory motion is recovered if one process is dominant. The effects of barrier width, external field, and in-plane wave factor kit on each process are addressed.