Browsing by Author "Lee, Jeng-Han"

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Application of secondary electron potential contrast on junction leakage isolation
(2009-09-21)
Liu, Po-Tsun
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Lee, Jeng-Han
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Huan, Y. S.
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Su, David
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光電工程學系
Secondary electron potential contrast (SEPC) technology with an in situ dynamic trigger was studied to inspect P(+)/N-well junction leakage arising from P-well misalignment in a static random access memory cell. Combining SEPC with scanning electron microscopy observations allows direct identification of the junction shift. Furthermore, an in situ negative bias applied to the P-well can create a wider depletion region and eliminate the leakage path in P(+)/N-well contacts, allowing the P(+)/N well to operate normally. This proposed in situ dynamic trigger method is a promising and effective approach to investigating device physics under a dynamic scope. (C) 2009 American Institute of Physics. [doi:10.1063/1.3233963]
Dynamic ink-jet printing analysis system with addressable waveform trimming
(2007-01-01)
Huang, Chieh-Yi
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Shang, Kuo-Chiang
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Wu, Kuo-Hua
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Lee, Jeng-Han
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Liu, Tsu-Min
Definitely the ink jet fabrication is an expectable technology for the fields of display and semiconductors, such like for the fabrication of color filters, the forming of metal circuits, the dispensing of liquid crystal, and for the further continuous manufacture of flexible displays etc. Recently, inkjet printing technologies have been rapidly developing and are not only for the diminished size of the drops to the pico-liter, the multiplex driving scheme, or for the real-time observation technology which led to the improvement of the inkjet printing performance, and which realized the pixel-to-pixel control. In this article, an electrical controller is designed to differentiate the waveform for each nozzle synchronously, to compensate for the nozzle cell deformation and pressure drag loss during inkjet firing at high voltage, and for a high frequency named addressable waveform trimming circuit (AWTC). The controller is composed of a high voltage control block which drives each nozzle, an FPGA chip to multiplex the high voltage output, an AID converter which transfers an analog signal into a digital signal and then into FPGA, a differential signal input to FPGA as feedback to correct analog output, which gives a real-time tracking of jetting quality to verify the nozzle-to-nozzle variation. For dynamic feedback of the drop variation in real jetting, this AWTC accepts correction signals by a machine vision system synchronously with the firing trigger in order to analyze the individual captured images. The maximum support nozzle channel is up to 1280 and can be handled within a 2% jetting accuracy.
Inspection of the Current-Mirror Mismatch by Secondary Electron Potential Contrast With In Situ Nanoprobe Biasing
(2011-10-01)
Liu, Po-Tsun
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Lee, Jeng-Han
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光電工程學系
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顯示科技研究所
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Department of Photonics
The mismatch mechanism in a current mirror consisting of laterally diffused p-channel MOS (LDPMOS) technology was investigated using a scanning electron microscope (SEM) with in situ nanoprobing. The electrical measurement found a saturation current mismatch of 52 mu A between the LDPMOS transistors. Furthermore, the proposed inspection identified successfully 0.4-mu m p-well layer misalignment, which was the root cause of the mismatch. This letter demonstrates that an in situ nanoprobing system is a powerful tool for enhancing p-well dopant contrast in a SEM, analyzing site-specific failures, and studying device physics under a dynamic scope.
Profiling p(+)/n-Well Junction by Nanoprobing and Secondary Electron Potential Contrast
(2011-07-01)
Liu, Po-Tsun
;
Lee, Jeng-Han
;
光電工程學系
;
顯示科技研究所
;
Department of Photonics
This letter investigates the use of secondary electron potential contrast (SEPC) with an in situ dynamic nanoprobing trigger to examine a silicon p(+)/n- well junction. Experimental results demonstrate that applying a bias to the p(+)/n- well junction nodes can intensify the SEPC signal. An image processing procedure is used to convert the image contrast to a voltage scale, allowing the depletion region to be identified. The proposed method can maintain stable voltage conditions in the junction, facilitating inspection of the dopant area by scanning electron microscopy, potentially contributing to the development of an efficient method for examining dopant areas in real circuits.
Surface Potential and Electric Field Mapping of p-well/n-well Junction by Secondary Electron Potential Contrast and in-situ Nanoprobe biasing
(2012-01-01)
Lee, Jeng-Han
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Liu, Po-Tsun
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Wang, M. H.
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Lin, Y. T.
;
Huan, Y. S.
This study investigates the p-well/n-well junction by using secondary electron potential contrast (SEPC) with in-situ nanoprobe biasing. Experimental result demonstrated dopant contrast is restored after applying electricity in the junction nodes. Furthermore, the image contrast was converted to a voltage scale, allowing the junction surface potential and electric filed distribution to be identified. The proposed method demonstrates that an in-situ nanoprobe system is powerful in dopant area inspection in SEM, potentially contributing to an efficient method in analyzing site-specific failure in real circuits.
Surface potential mapping of p(+)/n-well junction by secondary electron potential contrast with in situ nano-probe biasing
(2012-07-01)
Lee, Jeng-Han
;
Liu, Po-Tsun
;
光電工程學系
;
顯示科技研究所
;
Department of Photonics
This article investigates the surface potential distribution of a biased p(+)/n-well diode using secondary electron potential contrast (SEPC) with an in situ nano-probe trigger. The SEPC image is digitized and quantified for the conversion of the image contrast to the voltage scale, allowing for the identification of the depletion region and the electrical junction. The overlap length between the poly silicon gate and the V region is also depicted by two-dimensional (2-D) imaging. This study demonstrates that the proposed in situ nano-probe system is highly effective for surface potential mapping. (C) 2012 Elsevier B.V. All rights reserved.