Browsing by Author "Lee, LS"

Now showing 1 - 6 of 6

A hybrid overlay multicast routing protocol for mobile ad hoc networks
(2005)
Chen, CK
;
Wang, KC
;
Lee, LS
;
資訊工程學系
;
Department of Computer Science
We propose a novel multicast routing protocol, called Hybrid Overlay Multicast Routing Protocol (HOMRP) for MANETs (Mobile Ad hoc NETworks). Existing overlay and mesh multicast routing protocols in MANETs have the main drawback of low packet delivery ratio and high control overhead, respectively. In order to improve these shortcomings, we integrate multicasting and unicast tunnels for efficient packet delivery. In HOMRP, it creates multiple local multicast trees. Each pair of parent node and child node in a local multicast tree is at a distance of one-hop. It uses multicasting to deliver multicast packets in local multicast trees. This will provide efficient data forwarding. Unicast tunnels are used for transmitting packets between local multicast trees. Simulation results have shown that the packet delivery ratio of HOMRP is 50% better than that of AMRoute and is close to that of ODMRP. HOMRP reduces 18% control overhead compared to ODMRP and reduces 9% end-to-end packet delay compared to AMRoute.
Argon ion-implantation on polysilicon or amorphous-silicon for boron penetration suppression in p(+) pMOSFET
(1998-08-01)
Lee, LS
;
Lee, CL
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
In this paper, a technique to use Ar ion-implantation on the p(+)a-Si or poly-Si gate to suppress the boron penetration in p(+) pMOSFET is proposed and demonstrated. An Ar-implantation of a dose over 5 x 10(15) cm(-2) is shown to be able to sustain 900 degrees C annealing for 30 min for the gate without having the underlying gate oxide quality degraded, It is believed to be due to gettering of fluorine, then consequently boron, by the bubble-like defects created by the Ar implantation in the p+ gate region to reduce the B penetration. Excellent electrical characteristics like dielectric breakdown (E-bd), interface state density (D-it), and charge-to-breakdown (Q(bd)) On the gate oxide are obtained. The technique is compatible to the present CMOS process. The submicron pMOSFET fabricated by applying this technique exhibit better subthreshold characteristics and hot carrier immunity.
Design and analysis of QoS supported frequent handover schemes in microcellular ATM networks
(2001-07-01)
Wang, KC
;
Lee, LS
;
資訊工程學系
;
Department of Computer Science
Wireless information networks need to employ small radio cells to support large user populations. However, this will impose extra burden, on network traffic control as a result of frequent handover behavior. Existing approaches to support a high handover rate still have cell loss and cell out-of-sequence penalty while the handover is in progress. This paper proposes a novel handover protocol that can avoid cell loss and guarantee cell sequence. It can enhance the performance of a microcellular asynchronous transfer mode network. By multicasting cells to a new base station before handover, our scheme can avoid cell loss and support a nonoverlapping microcell environment as well. The multicast of signaling messages during handover is to coordinate the cell transmission order between the old base station and the new base station to guarantee cell sequence. A formal representation of the handover protocol using finite-state diagrams has been developed to specify and verify the protocol. To guarantee quality of service, we present a hierarchical wireless call admission control to limit the number of in-progress connections and to prevent radio channel congestion. Mathematical models have been developed to analyze two quality-of-service, parameters: handover dropping probability and forced termination probability. Experimental results show that our hierarchical wireless call admission control can effectively lower the handover dropping probability and the forced termination probability in comparison with the single-layer wireless call admission control.
Isolation on Si wafers by MeV proton bombardment for RF integrated circuits
(2001-05-01)
Lee, LS
;
Liao, CP
;
Lee, CL
;
Huang, TH
;
Tang, DDL
This paper studies issues related with using high energy protons to create local semi-insulating silicon regions on IC wafers for device isolation and realization of high-Q IC inductors, Topics on two approaches, i.e., one using Al as the radiation mask and the other using proton direct-write on wafers were studied, It was shown that Al can effectively mask the proton bombardment of 15 MeV up to the fluence of 10(17) cm(-2). For the unmasking direct write of the proton bombardment, isolation in the silicon wafer can be achieved without damaging active devices if the proton fluence is kept below 1 x 10(14) cm-2 with the substrate resistivity level chosen at 140 Omega -cm, or kept at 1 x 10(15) cm(-2) with the substrate resistivity level chosen at 15 Omega -cm. Under the above approaches, the 1 h-200 degreesC thermal treatment, which is necessary for device final packaging, still gives enough high resistivity for the semi-insulating regions while recovers somewhat the active device characteristics, For the integrated passive inductor fabricated on the surface of the silicon wafer, the proton radiation improves its Q value.
Reduction of epitaxial alignment in n(+)-p poly-Si emitter diode due to gettering of P and As by Ar implantation
(2000-03-16)
Lee, LS
;
Lee, CL
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
It is demonstrated that Ar implantation can retard the epitaxial realignment of poly-Si/Si in an As- or P-doped n(+)-p poly-emitter diode during BF2 implantation. This is believed to be due to the gettering of As, P, and F by bubble-like defects created by the Ar implantation used to reduce the pile-up of these dopants at the poly-Si/Si interface. Consequently, there is less break-up of the interface oxide, resulting in a reduction in epitaxial realignment.
Study on the interface thermal stability of metal-oxide-semiconductor structures by inelastic electron tunneling spectroscopy
(2006-06-26)
Huang, CF
;
Tsui, BY
;
Tzeng, PJ
;
Lee, LS
;
Tsai, MJ
The bias polarity-dependent inelastic electron tunneling spectroscopy is employed to detect the thermal stability of the Ta-Pt/SiO2/Si and Ta-Pt/HfO2/Si structures. This work provides a direct evidence that the Fermi-level pinning of metal gates is counted for the generation of extrinsic states due to interface interaction. A Ta2O5 layer forms at the Ta-Pt/SiO2 interface during thermal annealing whereas only an intermittent Ta-O bond is observed at the Ta-Pt/HfO2 interface. Although the heat of formation of HfO2 is lower than that of SiO2, Si presumably diffuses into HfO2 layer and replaces Hf atoms during the high-temperature annealing. (c) 2006 American Institute of Physics.